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參數(shù)資料
| 型號(hào)： | UPC1862 |
| 廠商： | NEC Corp. |
| 英文描述： | BURST LOCK CLOCK GENERATOR |
| 中文描述： | 爆破鎖時(shí)鐘發(fā)生器 |
| 文件頁(yè)數(shù)： | 26/32頁(yè) |
| 文件大?。?/td> | 252K |
| 代理商： | UPC1862 |
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26
μ
PC1862
Recommended pattern
The
μ
PC1862 generates system clock for synchronous signal processing and clock generate processing.
If the supply voltage, line placement and routing are not set appropriately that the
μ
PC1862 cannot generate correct
system clock.
Though the recommended pattern is not shows in this document, note points shown below at designing.
1.
2.
3.
For synchronous section and chroma section, each power supply must be isolated.
Lines to pin 9 to pin 13 should be as thick and short as possible.
Connect resonator as near IC as possible. Don’t put GND line between resonator pins for parasitism capacitance.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPC1862GS | 制造商:NEC 制造商全稱:NEC 功能描述:BURST LOCK CLOCK GENERATOR |
| UPC1870CA001 | 制造商:Panasonic Industrial Company 功能描述:IC |
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| UPC1872GH | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPC1874CT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TV/Video Sound Circuit |
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