參數(shù)資料
型號: UDA1384H
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Multichannel audio coder-decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 34/55頁
文件大小: 276K
代理商: UDA1384H
9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
34 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
11.8 DAC features settings
Table 42:
SEL1
Feature selection bits
SEL0
0
1
0
1
Function
all features (default)
volume
mute and quick mute
de-emphasis, polarity and input channel selection
0
0
1
1
Table 43:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
DAC features register (address 11h) bit allocation
15
14
13
ICS1
ICS0
DE2
0
0
0
12
DE1
0
read and write
4
VC4
0
read and write
11
DE0
0
10
PD
0
9
8
MT
0
QM
0
7
6
5
3
2
1
0
VC7
0
VC6
0
VC5
0
VC3
0
VC2
0
VC1
0
VC0
0
Table 44:
Bit
15 to 14
Description of DAC features register bits
Symbol
Description
ICS[1:0]
Input channel selection.
A 2-bit value to select the input channels. As
the controlled channels are paired off, this 2-bit value must be written
to each odd channel register. Default 00. See
Table 45
.
DE[2:0]
De-emphasis setting.
A 3-bit value to enable the digital de-emphasis
filter. Default 000. See
Table 46
.
PD
Polarity DAC control.
Bit PD controls the DAC polarity.
1 = polarity is inverted
0 = polarity is not-inverted (default)
MT
Muting.
Bit MT enables the digital mute. All the DAC outputs are
muted at start-up. It is necessary to explicitly switch off for the audio
output by means of bit MT.
1 = muting (start-up)
0 = no muting (default)
QM
Quick mute.
Bit QM sets the quick mute mode.
1 = quick mute mode
0 = soft mute mode (default)
VC[7:0]
Interpolator volume control.
An 8-bit value to program the volume
attenuation of each channel. The range is from 0 dB to
53 dB in steps
of 0.25 dB, from
53 dB to
80 dB in steps of 3 dB and
dB.
Default 0000 0000. See
Table 47
.
13 to 11
10
9
8
7 to 0
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