參數(shù)資料
型號(hào): UDA1384H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Multichannel audio coder-decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 10/55頁
文件大小: 276K
代理商: UDA1384H
9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
10 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
8.9 Audio digital-to-analog converters
The audio digital-to-analog front-end of the UDA1384 consists of 6-channel differential
SDACs: an SDAC is a multi-bit DAC based upon switched resistors. To minimize data
dependent modulation effects, a Dynamic Element Matching (DEM) algorithm scrambler
circuit and DC current compensation circuit are implemented with the SDAC.
8.10 Power-on reset
The UDA1384 has an internal power-on reset circuit which initializes the device (see
Figure 5
). All the digital sound processing features and the system controlling features are
set to their default values in the L3-bus and the I
2
C-bus modes.
The reset time (see
Figure 6
) is determined by an external capacitor which is connected
between pin V
ref
and ground. The reset time should be at least 250
μ
s for V
ref
< 1.25 V.
When V
DDA(AD)
is switched off, the device will be reset again for V
ref
< 0.75 V.
During the reset time, the system clock should be running.
Fig 4.
Block diagram of DAC mixer
mgw786
MIX[1:0]
DIS[1:0]
ICS[1:0]
from ADC
ch1
ch2
MIXER
VOLUME
MIXER
MUTE
DAC1
1f
s
VOLUME
DE-EMPHASIS
MUTE
DAC2
same as above
DAC3
same as above
DAC4
same as above
DAC5
same as above
DAC6
same as above
INTERPOLATION
FILTER
mixer input
ch3
ch4
from I
2
S-bus
DATADA1
DATADA2
DATADA3
+
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