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參數(shù)資料
| 型號(hào)： | UDA1380TT |
| 元件分類： | 通用總線功能 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3 |
| 中文描述： | 立體聲音頻編碼器，可用于MD，CD和MP3解碼器 |
| 文件頁數(shù)： | 49/68頁 |
| 文件大小： | 278K |
| 代理商： | UDA1380TT |
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2002 Sep 16
49
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
11.17 Decimator read-out
Table 67
Register address 28H
Table 68
Description of the register bits
4
SDETR1
Interpolator silence detect channel 1 right.
When this bit is logic 0:
interpolator on channel 1 right input has detected no silence. When this bit is
logic 1: interpolator on channel 1 right input has detected silence.
Interpolator silence detect channel 1 left.
When this bit is logic 0:
interpolator on channel 1 left input has detected no silence. When this bit is
logic 1: interpolator on channel 1 left input has detected silence.
Interpolator muting.
A 1-bit value which signals whether the interpolator has
reached mute or not. When this bit is logic 0: interpolator is not muted. When
this bit is logic 1: interpolator is muted.
Interpolator muting channel 2.
When this bit is logic 0: interpolator channel 2
is not muted. When this bit is logic 1: interpolator channel 2 is muted.
Interpolator muting channel 1.
When this bit is logic 0: interpolator channel 1
is not muted. When this bit is logic 1: interpolator channel 1 is muted.
3
SDETL1
2
MUTE_STATE_M
1
MUTE_STATE_CH2
0
MUTE_STATE_CH1
BIT
15
14
13
12
11
10
9
8
Symbol
BIT
7
6
5
4
3
2
1
0
Symbol
AGC_STAT
MT_ADC_STAT
OVERFLOW
BIT
SYMBOL
DESCRIPTION
15 to 5
4
AGC_STAT
not used
AGC gain status.
A 1-bit value which signals whether the AGC gain exceeds
8 dB or not. Only valid when the AGC is switched on. When this bit is logic 0:
AGC gain <8 dB. When this bit is logic 1: AGC gain
≥
8 dB.
not used
Decimator mute.
A 1-bit value which signals whether the decimator has
reached mute or not. When this bit is logic 0: decimator has not muted. When
this bit is logic 1: decimator has muted.
not used
Digital output overflow detection.
A 1-bit value which signals whether the
digital output amplitude exceeds
1.16 dB or not. When this bit is logic 0: no
overflow detected (read-out). When this bit is logic 1: overflow detected
(read-out).
3
2
MT_ADC_STAT
1
0
OVERFLOW
BIT
SYMBOL
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UDA1384 | Multichannel audio coder-decoder |
| UDA1384H | Multichannel audio coder-decoder |
| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ10B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1380TT/N2 | 制造商:PHILIP 功能描述: |
| UDA1380TT/N2,512 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT/N2,518 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT-T | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1384 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multichannel audio coder-decoder |
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