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| 型號： | UDA1380TT |
| 元件分類： | 通用總線功能 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3 |
| 中文描述： | 立體聲音頻編碼器，可用于MD，CD和MP3解碼器 |
| 文件頁數(shù)： | 23/68頁 |
| 文件大?。?/td> | 278K |
| 代理商： | UDA1380TT |
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2002 Sep 16
23
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
9.5
Data write mode
For writing data to a device, four bytes must be sent. Figure 14 explains the data write mode in a signal diagram:
One byte with the device address, being ‘00000110’, which is including the LSB code 01 for signalling write to the
device
One byte starting with a logic 0 for signalling write, followed by 7 bits indicating the destination address
Two data bytes.
The SYSCLK signal must be applied in data write mode.
Table 8
L3 write data
Notes
1.
2.
First bit in time.
Last bit in time.
L3 MODE
DATA TYPE
BIT
0
(1)
1
2
3
4
5
6
7
(2)
Addressing mode
Data transfer 1
Data transfer 2
Data transfer 3
device address
register address
MS data byte
LS data byte
0
0
1
1
0
0
0
0
0
A6
D14
D6
A5
D13
D5
A4
D12
D4
A3
D11
D3
A2
D10
D2
A1
D9
D1
A0
D8
D0
D15
D7
9.6
Data read mode
For reading from the device, first a prepare-read must be
done. After this, the device address is sent again. The
device then returns with the register address, indicating
whether the address was valid or not, and the data of the
register. The following five steps explain this procedure,
and an example of transmission is given in Fig.15.
One byte with the device address, being ‘00000110’,
which is including the LSB code 01 for signalling write to
the address
One byte is sent with the register address from which it
needs to be read. This byte starts with a logic 1, which
indicates that there will be a read action from the register
One byte with the device address including ‘11’ is sent
to the device, being 00000111. The ‘11’ indicates that
the device must write data to the microcontroller, then
the microcontroller frees the L3DATA-bus so the
UDA1380 can send the register address byte and its
two-byte contents
The device now writes the requested register address
on the bus, indicating whether the requested register
was valid or not (logic 0 means valid, logic 1 means
invalid)
The device writes the data from the requested register
on the bus, being two bytes.
The SYSCLK signal must be applied in data read mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UDA1384 | Multichannel audio coder-decoder |
| UDA1384H | Multichannel audio coder-decoder |
| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ10B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1380TT/N2 | 制造商:PHILIP 功能描述: |
| UDA1380TT/N2,512 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT/N2,518 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT-T | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1384 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multichannel audio coder-decoder |
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