參數(shù)資料
型號: UDA1380TT
元件分類: 通用總線功能
英文描述: Stereo audio coder-decoder for MD, CD and MP3
中文描述: 立體聲音頻編碼器,可用于MD,CD和MP3解碼器
文件頁數(shù): 33/68頁
文件大?。?/td> 278K
代理商: UDA1380TT
2002 Sep 16
33
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
Table 24
Digital data output formats
11.3
Power control settings
11.3.1
P
OWER CONTROL SETTING BIAS CIRCUITS
Using a 1-bit value, the power control settings of the bias circuits of the ADC, AVC and FSDAC can be set. When this bit
is set to logic 0, the complete bias circuits of the analog front-end and the FSDAC are shut down. In this case, the
reference voltage disappears from the input of the ADCs and LNA and the output of the FSDAC, this can cause plops,
but saves power.
Table 25
Register address 02H
Table 26
Description of register bits
SFORO2
SFORO1
SFORO0
SERIAL_FORMAT_DAO
I
2
S-bus (default)
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
LSB-justified, 24 bits
MSB-justified
not used: mapped to I
2
S-bus
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
BIT
15
14
13
12
11
10
9
8
Symbol
PON_PLL
PON_HP
PON_DAC
PON_
BIAS
0
Default
0
0
0
0
0
0
0
BIT
7
6
5
4
3
2
1
0
Symbol
EN_AVC
PON_AVC
PON_LNA
PON_
PGAL
0
PON_
ADCL
0
PON_
PGAR
0
PON_
ADCR
0
Default
0
0
0
0
BIT
SYMBOL
DESCRIPTION
15
PON_PLL
Power-on WSPLL.
When this bit is logic 0: power-off; when this bit is logic 1:
power-on. Default value 0.
default value 0
Power-on headphone driver.
A 1-bit value to switch the headphone driver into
power-on or Power-down mode. When this bit is logic 0: headphone driver is
powered-off; when this bit is logic 1: headphone driver is powered-on. Default
value 0.
default value 00
Power-on DAC.
A 1-bit value to switch the DAC into power-on or
Power-down mode. In this Power-down mode the V
REF
(half the power supply
voltage) will remain on the FSDAC output. When this bit is logic 0: DAC is
powered-off; when this bit is logic 1: DAC is powered-on. Default value 0.
default value 0
14
13
PON_HP
12 and 11
10
PON_DAC
9
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