參數(shù)資料
型號: TVP70025IPZP
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: GREEN, PLASTIC, HTQFP-100
文件頁數(shù): 10/59頁
文件大小: 519K
代理商: TVP70025IPZP
SLES232B
– JUNE 2008 – REVISED MAY 2011
If activity is detected on the HSYNC input but not on the VSYNC input, the host processor should assume that
the PC graphics input is a standard 4-wire interface. In this case, the HSYNC input of the TVP70025I should be
used as a digital CSYNC input. If AHSO and AVSO are set for automatic selection, VSYNC is properly decoded
from the CSYNC input, provided no signal is present at the VSYNC input pin. Some test sources output CSYNC
on both the HSYNC pin and the VSYNC pin. In this case, the active VSYNC source (AVSS) must be manually
set to Sync separated VSYNC in Reg 0Eh. The TVP70025I supports the following two types of CSYNC inputs.
CSYNC = VSYNC XOR HSYNC (default)
CSYNC = VSYNC OR HSYNC
If activity is not detected on either the HSYNC input or the VSYNC input, the host processor should assume that
the PC graphics input is a standard 3-wire interface. With AHSO and AVSO set for automatic selection and no
signals present at the HSYNC and VSYNC input pins, the TVP70025I automatically selects the SOG input as the
sync source.
VSYNC INPUT
HSYNC INPUT
PC GRAPHICS
ACTIVITY DETECT
INPUT TYPE
1
5 wire (default)
1
0
Undefined (assume 5 wire)
0
1
4 wire
0
3 wire
The activity detection status for the VSYNC and HSYNC inputs is written to the I2C status register at subaddress
14h.
NOTE
Pin 13 of a standard 15-pin VGA video connector can be either a horizontal sync
(HSYNC) or a composite sync (CSYNC).
NOTE
For component video inputs, the active HSYNC and VSYNC should always be derived
from the selected SOG input. This can most easily be ensured by setting the AHSO,
AVSO, AHSS and AVSS bit fields in register 0Eh to logic 1.
NOTE
For proper operation when separate HSYNC and VSYNC inputs are used, the leading
edge of VSYNC must not be precisely aligned with the leading edge of HSYNC. A simple
RC delay circuit provides adequate delay in most applications.
18
Copyright
2008–2011, Texas Instruments Incorporated
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