參數(shù)資料
型號(hào)： TVP70025IPZP
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： GREEN, PLASTIC, HTQFP-100
文件頁(yè)數(shù)： 1/59頁(yè)
文件大?。?/td> 519K
代理商： TVP70025IPZP
SLES232B
– JUNE 2008 – REVISED MAY 2011
TRIPLE 10-BIT, 90-MSPS,
VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
Check for Samples: TVP70025I
1
FEATURES
23
Analog Channels
Output Formatter
– –6-dB to 6-dB Analog Gain
– Supports 20-bit 4:2:2 Outputs With
Embedded Syncs
– Analog Input Multiplexers (MUXs)
– Support for RGB/YCbCr 4:4:4 and YCbCr
– Automatic Video Clamp
4:2:2 Output Modes to Reduce Board
– Three Digitizing Channels, Each With
Traces
Independently Controllable Clamp, Gain,
– Dedicated DATACLK Output With
Offset, and Analog-to-Digital Converter
Programmable Output Polarity for Easy
(ADC)
Latching of Output Data
– Clamping: Selectable Clamping Between
System
Bottom Level and Mid Level
– Industry-Standard Normal/Fast I2C Interface
– Offset: 1024-Step Programmable RGB or
With Register Readback Capability
YPbPr Offset Control
– Space-Saving 100-Pin TQFP Package
– Gain: 8-Bit Programmable Gain Control
– Thermally-Enhanced PowerPAD Package
– ADC: 10-Bit 90-MSPS A/D Converter
for Better Heat Dissipation
– Automatic Level Control (ALC) Circuit
– Industrial Temperature Range –40°C to
– Composite Sync: Integrated Sync-on-Green
85
°C
Extraction From Green/Luminance Channel
– Support for DC- and AC-Coupled Input
APPLICATIONS
Signals
LCD TV/Monitors/Projectors
– Programmable Video Bandwidth Control
DLP TV/Projectors
– Supports Component Video Standards 480i,
PDP TV/Monitors
576i, 480p, 576p, 720p, and 1080i
LCOS TV/Monitors
– Supports PC Graphics Inputs up to 90
MSPS
PCTV Set-Top Boxes
– Programmable RGB-to-YCbCr Color Space
Digital Image Processing
Conversion
Video Capture/Video Editing
Horizontal Phase-Locked Loop (PLL)
Scan Rate/Image Resolution Converters
– Fully Integrated Horizontal PLL for Pixel
Video Conferencing
Clock Generation
Video/Graphics Digitizing Equipment
– 9-MHz to 90-MHz Pixel Clock Generation
From HSYNC Input
– Adjustable Horizontal PLL Loop Bandwidth
for Minimum Jitter
– 5-Bit Programmable Subpixel Accurate
Positioning of Sampling Phase
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
3
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright
2008–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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