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Preliminary Specification
TUA6100B6
High-Frequency-Products
6
26.1.01
8.6
Crystal Oscillator Output
Parameter
see Crystal oscillator output on page 26
To reduce the amount of application components in combination with a digital QPSK demodulator, the
TUA 6100 offers an buffered Push-Pull output of the crystal oscillator. The frequency is the crystal
frequency and is not programmable, the output signal is always on.
8.7
Synthesizer Loop filter
Parameter
see Synthesizer Loop filter high voltage tuning output on page 25
The synthesizer active loop filter consists of a simple inverting BICMOS amplifier with MOS input and a
special open collector output transistor which can handle high voltage and high output currents.
The loop filter input is internal connected to the phase detector / charge pump output.
The BICMOS amplifier output may be disabled (high Z) by bus, control register (
Register 00
,D0).
8.8
Synthesizer VCO
Parameter
see Synthesizer VCO on page 26 .
The synthesizer VCO is a symmetrical Colpitts type oscillator with an external tank circuit.
The tank circuit consists of two microstrip lines connected to the oscillator bases and at the
microstrip line ends two serial connected varicap diodes. These diodes are driven by the
tuning voltage.
The synthesizer VCO oscillates at a programmed offset to the input frequency.
This guarantees minimum oscillator pulling and self-mixing with the result of undesirable
DC-signal voltage.
The offset may be at low side or high side of the input signal or zero (that means F
vco
= F
input
).
The VCO tuning range is digital split into 2 or 3 bands controlled by the internal GHz PLL.
(not possible if operation F
vco
= F
input
is desired for the hole tuning range)
Advantages :
only one optimized VCO for the complete tuning range which is approx. 1 : 2.34
(due to the KVCO and Loop bandwidth variation it is difficult to obtain this range by one
conventional VCO with constant low phase noise) .
reduced external components
smaller package
lower phase noise due to the reduced tuning range of VCO
lower synthesizer loop filter bandwidth variation
lower maximum tuning voltage.
Detailed programming tables
see GHz PLL programming on page 9.
8.9
Phase Shift 0 / 90
Parameter
see Synthesizer PLL on page 25
To get minimum quadrature phase error, a digital generation of the 0 /90 phase shifted local
oscillator signal is implemented by a 3.8-8.6 GHz Johnson-counter
This counter is designed in high speed stacked ECL bipolar technology.
8.10 GHz VCO
Two On-Chip bipolar LC-Oscillators (3.4-6.2 GHz and 6.0-8.6 GHz) controlled via On-Chip PLL .
The GHz VCO’s oscillate at 4 x of the input frequency and are current controlled.
The resonant circuit is an on chip symmetrical inductor driven by differential pair amplifier whose
current variable parasitic capacitance is used for frequency tuning.
The used special multi-tanh gilbert cell makes a wide tuning range possible.
The complete GHz VCO’s are under control of a 3.8-8.6 GHz PLL system.
The reference frequency of this system is the output of the synthesizer VCO divided by a
programmable counter; variation is 118-538 MHz(depending on the selected synthesizer tuning range).
At the same time this is the operating frequency range of the phase detector / charge pump.
The high speed charge pump is completely on chip and designed in BICMOS technology with an
external loop filter bandwidth set to 9 MHz.
The GHz VCO frequency is fed to the phase detector via the high speed ECL Johnson counter 4
and a lower speed programmable ECL counter.