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參數(shù)資料
| 型號： | TS83102G0BMGS |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152 |
| 封裝： | 21 X 21 MM, 1.27 MM PITCH, HERMETIC SEALED, CERAMIC, CGA-152 |
| 文件頁數(shù)： | 17/54頁 |
| 文件大?。?/td> | 2622K |
| 代理商： | TS83102G0BMGS |
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24
0935B–BDC–06/08
TS83102G0BMGS
e2v semiconductors SAS 2008
Figure 6-14. Fs = 1.4 Gsps and Fin = 1399 MHz, –1 dBFS; Decimation Factor = 8, 32 kpoints FFT
6.1.7
SFDR Performance with/without External Dither
Figure 6-15. SFDR (in dBC) With and Without Dither (–23 dBm DC to 5 MHz Out of Band Dither)
Fs = 1.4 Gsps and Fin = 710 MHz
An increase in SFDR up to >10 dB with an addition of –23 dBrms DC to 5 MHz out-of-band dither is
noted.
The dither profile has to be defined according to the ADC’s INL pattern as well as the trade-off to be
reached between the increase in SFDR and the loss in SNR.
Please refer to the Application Note reference 0868 on dither for more information on adding dither to an
ADC.
0
100
200
300
400
500
600
700
800
900
1000
0
5000
10000
15000
20000
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30000
Samples
LSB
-140
-120
-100
-80
-60
-40
-20
0
20
0
100
200
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700
=Fs/2
dBc
MHz
SFDR = -57 dBc
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