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參數資料
| 型號： | TMC22091R0C |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Digital Video Encoders/Layering Engine |
| 中文描述： | COLOR SIGNAL ENCODER, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數： | 53/60頁 |
| 文件大?。?/td> | 293K |
| 代理商： | TMC22091R0C |
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PRODUCT SPECIFICATION
TMC22091/TMC22191
53
Figure 37. TMC22x91-to-TMC22071 Interface Circuit
2
8
8
27009A
CVBS7-0
GHSYNC
GVSYNC
PXCK
R
D
A
C
R
LDV
CVBS7-0
GHSYNC
GVSYNC
PXCK
LDV
MICROPROCESSOR
INTERFACE
GENLOCKING VIDEO DIGITIZER
TMC22071
DIGITAL VIDEO ENCODER
TMC22x91
R
D
A
C
R
Printed Circuit Board Layout
Designing with high-performance mixed-signal circuits
demands printed circuits with ground planes. Overall system
performance is strongly influenced by the board layout.
Capacitive coupling from digital to analog circuits may
result in poor picture quality. Consider the following sugges-
tions when doing the layout:
Keep analog traces (COMP, V
REF
, R
REF
) as short and as
far from all digital signals as possible.
The power plane for the TMC22x91 should be separate
from that which supplies other digital circuitry. A single
power plane should be used for all of the V
DD
pins. If the
power supply for the TMC22x91 is the same for the
system’s digital circuitry, power to the TMC22x91 should
be filtered with ferrite beads and 0.1
μ
F capacitors to
reduce noise.
The ground plane should be solid, not cross-hatched.
Connections to the ground plane should be very short.
Decoupling capacitors should be applied liberally to V
DD
pins. For best results, use 0.1
μ
F capacitor in
parallel with 47
μ
F capacitors. Lead lengths should be
minimized. Ceramic chip capacitors are the best choice.
The PXCK should be handled carefully. Jitter and noise
on this clock or its ground reference will translate to noise
on the video outputs. Terminate the clock line carefully to
eliminate overshoot and ringing.
Microprocessor I/O Operations
Various CLUT Read/Write operations are shown in Table 17.
Each step in the table requires a CS pulse (falling edge fol-
lowed by a rising edge) to execute.
For Write operations, R/W and A
1-0
must conform to setup
and hold timing with respect to the falling edge of CS. D
7-0
must meet setup and hold timing with respect to the rising
edge of CS. These timing relationships are illustrated in Fig-
ure 10. When writing data into an internal register (i.e.
CLUT Address Register) an extra CS falling edge is required
to transfer the input data to that register. This requirement is
usually accomplished by executing the next step in the
sequence. If there is no planned next step in the sequence,
executing a Control Register Read step will meet the require-
ment and terminate the sequence.
For Read operations, R/W and A
1-0
must conform to setup
and hold timing with respect to the falling edge of CS. Read
data on D
7-0
is initiated by the falling edge of CS\ and termi-
nated by the rising edge of CS as shown in Figure 11. When
reading Control Registers, valid data appears t
DOM
after the
falling edge of CS. When reading CLUT locations, an extra
CLUT Read step is needed to set up the CLUT Read
sequence. This is accomplished in the table by executing an
extra CLUT Read step just before the CLUT Read sequence
which returns successive d, e, and f data. CLUT Read
sequences must be terminated an extra CS falling edge. This
requirement is usually accomplished by executing the next
I/O step. If there is no planned next step in the sequence,
executing a Control Register Read step will meet the require-
ment and terminate the sequence.
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PDF描述 |
|---|---|
| TMC22191R0C | Digital Video Encoders/Layering Engine |
| TMC22091 | Digital Video Encoders(數字視頻編碼器) |
| TMC22191 | Digital Video Encoders(數字視頻編碼器) |
| TMC2242A | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| TMC2242BKTC | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TMC22091R0CT | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22091ROC-T | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC22151AKHC | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
| TMC22151KHC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC22152AKHC | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
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