參數(shù)資料
型號: TMC22091R0C
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Digital Video Encoders/Layering Engine
中文描述: COLOR SIGNAL ENCODER, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 51/60頁
文件大?。?/td> 293K
代理商: TMC22091R0C
PRODUCT SPECIFICATION
TMC22091/TMC22191
51
Switching Characteristics
Notes:
1. Timing reference points are at the 50% level.
2. Analog C
LOAD
< 10 pF, D
7-0
load < 40 pF.
3. Pipeline delay, with respect to PXCK, is a function of the phase relationship between the internally generated PCK (PXCK/2)
and PXCK, as established by the hardware reset.
4. t
DOM
= 1 PXCK + 54 ns = 100 ns worst-case at PXCK = 24.54 MHz.
System Performance Characteristics
Notes:
1. TTL input levels are 0.0 and 3.0 Volts, 10%-90% rise and fall times <3 ns.
2. Analog C
LOAD
< 10 pF, D
7-0
load < 40 pF.
3. NTSC
Parameter
PIPES
Conditions
PD to Analog Out
Min.
44
Typ.
44
Max.
44
Units
PXCK
periods
ns
ns
ns
ns
ns
Pipeline Delay
3
t
DOZ
t
DOM
t
HOM
t
DOTP
t
HOTP
Output Delay, CS to low-Z
Output Delay, CS to Data Valid
4
Output Hold Time, CS to hi-Z
Output Delay, TCK to TDO Valid
Output Hold Time, TCK to TDO
Valid
Output Delay
6
23
100
10
30
5
t
DOS
PXCK to VHSYNC,
VVSYNC, PDC
10% to 90% of full-scale
90% to 10% of full-scale
25
ns
t
R
t
F
t
DOV
D/A Output Current Risetime
D/A Output Current Falltime
Analog Output Delay
2
2
ns
ns
ns
20
Parameter
RES
ELI
ELD
EG
dp
Conditions
Min.
10
Typ.
10
Max.
10
0.25
0.20
±
10
Units
Bits
%
%
% FS
degree
D/A Converter Resolution
Integral Linearity Error
Differential Linearity Error
Gain Error
Differential Phase
PXCK = 24.54 MHz,
40 IRE Ramp
3
PXCK = 24.54 MHz,
40 IRE Ramp
3
0.5
dg
Differential Gain
0.9
%
SKEW
PSRR
CHROMA to LUMA Output Skew
Power Supply Rejection Ratio
0
2
ns
%/
CCOMP = 0.1
μ
F, f = 1kHz
0.5
%VDD
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PDF描述
TMC22191R0C Digital Video Encoders/Layering Engine
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