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參數(shù)資料
| 型號(hào)： | TMC22091R0C |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | Digital Video Encoders/Layering Engine |
| 中文描述： | COLOR SIGNAL ENCODER, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁(yè)數(shù)： | 24/60頁(yè) |
| 文件大?。?/td> | 293K |
| 代理商： | TMC22091R0C |
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TMC22091/TMC22191
PRODUCT SPECIFICATION
24
Table 5. CLUT Locations Addressed by
Overlay Inputs (TMC22191)
OL
4-0
00
01
02
0E
0F
10
11
12
CLUT location
No Overlay
01
02
0E
0F
No Overlay
F1
F2
Color-space Conversion in the Matrix
When the input pixels are in RGB, GBR, or color-index for-
mat and the CLUT is bypassed (TMC22191), the Matrix
remains enabled, converting RGB data to color-difference
format. When the input pixels are in 444 format
(YC
B
C
R
444, RGB, GBR, CI), the Interpolator (which con-
verts 422 to 444) is not active. When the input pixels are in
YC
B
C
R
format, the CLUT is enabled to scale the data to
color-difference values and the Matrix is inactive. In color-
index mode, the Matrix is active, converting the RGB CLUT
output data to color-difference values.
1E
1F
FE
FF
Table 5. CLUT Locations Addressed by
Overlay Inputs (TMC22191)
(continued)
OL
4-0
CLUT location
Table 6. Pixel Input Operation for Format Control Register bit 6 = HIGH (TMC22191)
Note:
The pixel input sequence begins on the first LDV pulse after PDC goes HIGH. n = Odd number
Figure 2. Pixel Data (PD
23-0
) Sequence for YC
B
C
R
422
Format Control Register
FORMAT
Bit 3,2
00 (RGB)
00
00
00
01
10 (GBR)
10
10
10
11
Pixel Data Format
INMODE
Bit 1,0
00 (444)
01 (422)
10 (15-bit)
11 (CI)
xx
00 (444)
01 (422)
10 (15-bit)
11 (CI)
xx
BYPASS = LOW
CLUT bypassed
RGB
RGB
RGB
RGB
reserved
GBR
GBR
GBR
GBR
not allowed
BYPASS = HIGH
CLUT enabled
YC
B
C
R
444
YC
B
C
R
422
RGB15
CI
reserved
YC
B
C
R
444
YC
B
C
R
422
GBR15
CI
not allowed
MSB
23
Format Control Register Bit 6 = HIGH
Format Control Register Bit 6 = LOW
MSB
23
16
Y
1
Y
2
Y
3
Y
4
LSB
0
16
Y
1
Y
2
Y
3
Y
4
Y
n
Y
n+1
C
B1
C
B1
C
B3
C
B3
C
Bn
C
Bn
C
R1
C
R1
C
R3
C
R3
C
Rn
C
Rn
Pixel 1
Pixel 2
Pixel 3
Pixel 4
Pixel n
Pixel n+1
15
8 7
LSB
0
Y
n
Y
n+1
C
B1
C
R1
C
B3
C
R3
C
Bn
C
Rn
Pixel 1
Pixel 2
Pixel 3
Pixel 4
Pixel n
27003A
Pixel n+1
15
8 7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC22191R0C | Digital Video Encoders/Layering Engine |
| TMC22091 | Digital Video Encoders(數(shù)字視頻編碼器) |
| TMC22191 | Digital Video Encoders(數(shù)字視頻編碼器) |
| TMC2242A | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
| TMC2242BKTC | Digital Half-Band Interpolating/Decimating Filter 12-bit In/16-bit Out, 60 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC22091R0CT | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22091ROC-T | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC22151AKHC | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
| TMC22151KHC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC22152AKHC | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
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