參數(shù)資料
型號(hào)： TLC320AD50IPT
廠(chǎng)商： Texas Instruments, Inc.
英文描述： SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
中文描述： sigma - delta模擬接口，具有大師電路，從功能
文件頁(yè)數(shù)： 41/84頁(yè)
文件大小： 447K
代理商： TLC320AD50IPT
3–2
3.3
Electrical Characteristics Over Recommended Range of Operating
Free-Air Temperature, MCLK = 5.184 MHz, V
DD
= 5 V, Outputs
Unloaded, Total Device
PARAMETER
TEST CONDITIONS
PWR DWN = 1 and clock signals
present
MIN
TYP
MAX
UNIT
IDD
Supply
current
20
22
mA
PWR DWN = 0 after 500
μ
s and
clock signals present
1
2
mA
PWR DWN = 1 and clock signals
present
100
mW
PD
Power
dissipation
PWR DWN = 0 after 500
μ
s and
clock signals present
5
mW
Software power down, (bit D00,
register 6 set to 1)
15
20
mW
ADC VMID
Midpoint
voltage
No load
ADC VDD/2
–0.1
ADC VDD/2
+0.1
V
DAC VMID
Midpoint
voltage
No load
DAC VDD/2
–0.1
DAC VDD/2
+0.1
V
3.4
Electrical Characteristics Over Recommended Range of Operating
Free-Air Temperature, V
DD
= 5 V, Digital I/O Terminals (DIN, DOUT, EOC,
FC0, FC1, FS, FSD, MCLK, M/S, SCLK)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
VOL
IIH
IIL
Ci
Co
All typical values are at VDD = 5 V and TA = 25
°
C.
3.5
Electrical Characteristics Over Recommended Range of Operating
Free-Air Temperature, V
DD
= 5 V, ADC and DAC Channels
3.5.1
ADC Channel Filter Transfer Function, FCLK = 144 kHz, f
s
= 8 kHz
PARAMETER
High-level output voltage
IOH = –1.6 mA
IOL = 1.6 mA
VI = 2.2 V to DGTL VDD
VI = 0 V to 0.8 V
2.4
V
Low-level output voltage
0.4
V
μ
A
μ
A
pF
High-level input current, any digital input
10
Low-level input current, any digital input
10
Input capacitance
5
Output capacitance
5
pF
TEST CONDITIONS
fi = 50 Hz
fi = 200 Hz
fi = 300 Hz to 3 kHz
fi = 3.3 kHz
fi = 3.4 kHz
fi = 4 kHz
fi
≥
4.6 kHz
MIN
MAX
–2
UNIT
–1.8
–0.2
–0.15
0.2
Gain relative to gain at fi = 1020 Hz (see Note 3)
–0.35
0.03
dB
–1
–0.1
–14
–32
NOTE 3: The differential analog input signals are sine waves at 6 V peak to peak. The reference gain is at 1020 Hz.
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