
182
Agere Systems Inc.
Data Sheet
May 2001
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
Register Descriptions
(continued)
OHP Registers
(continued)
Table 82. Registers 0x0430, 0x0432, 0x0434: Transmit Control Port [B
—
D] (R/W)
(continued)
Reset default of registers = 0x0003.
Address
(Hex)
0430, 0432,
0434
Bit #
Name
Function
Reset
Default
0
9
TTOAC_S1[B
—
D]
Transmit TOAC S1 Byte Control Channel
[B
—
D].
Control bit, when set to logic 0, causes
the default value to be inserted into the S1 byte
in the transmit frame. Setting this bit to logic 1
causes the TTOAC value to be inserted into the
S1 byte. TTOAC_S1[A] is valid for STS-48/
STM-16 mode.
Transmit TOAC D4 to D12 Byte Control
Channel [B
—
D].
Control bit, when set to logic
0, causes the default value to be inserted into
the D4 to D12 bytes in the transmit frame. Set-
ting this bit to logic 1 causes the TTOAC value
to be inserted into the D4 to D12 bytes.
TTOAC_D4TO12[A] is valid for STS-48/STM-16
mode.
Transmit TOAC D1 to D3 Byte Control Chan-
nel [B
—
D].
Control bit, when set to logic 0,
causes the default value to be inserted into the
D1 to D3 bytes in the transmit frame. Setting
this bit to logic 1 causes the TTOAC value to be
inserted into the D1 to D3 bytes.
TTOAC_D1TO3[A] is valid for STS-48/STM-16
mode.
Transmit TOAC F1 Byte Control Channel
[B
—
D].
Control bit, when set to logic 0, causes
the default value to be inserted into the F1 byte
in the transmit frame. Setting this bit to logic 1
causes the TTOAC value to be inserted into the
F1 byte. TTOAC_F1[A] is valid for STS-48/
STM-16 mode.
Transmit TOAC E1 Byte Control Channel
[B
—
D].
Control bit, when set to logic 0, causes
the default value to be inserted into the E1 byte
in the transmit frame. Setting this bit to logic 1
causes the TTOAC value to be inserted into the
E1 byte. TTOAC_E1[A] is valid for STS-48/
STM-16 mode.
8
TTOAC_D4TO12[B
—
D]
0
7
TTOAC_D1TO3[B
—
D]
0
6
TTOAC_F1[B
—
D]
0
5
TTOAC_E1[B
—
D]
0