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參數(shù)資料
| 型號： | TAS5036APFCRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Six Channel Digital Audio PWM Processor |
| 中文描述： | 六通道數(shù)字音頻PWM處理器 |
| 文件頁數(shù)： | 37/62頁 |
| 文件大?。?/td> | 790K |
| 代理商： | TAS5036APFCRG4 |
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System Procedures for Initialization, Changing Data Rates, and Switching Between Master and Slave Modes
31
SLES061B—November 2002—Revised January 2004
TAS5036A
4
System Procedures for Initialization, Changing Data Rates, and
Switching Between Master and Slave Modes
4.1
System Initialization
Reset is used during system initialization to hold the TAS5036A inactive while power (VDD), the master clock
(MCLK_IN), the device control, and the data signals become stable. The recommended initialization
sequence is to hold RESET low for 24 MCLK_IN cycles after VDD has reached 3 V and the other control
signals (MUTE, PDN, M_S, ERR_RCVRY, DBSPD, and CS0) are stable.
Figure 41 shows the recommended sequence and timing for the RESET terminal relative to system VDD
voltage and MCLK.
MCLK
VDD
3 V
24 MCLK_IN Cycles
RESET
Figure 41. RESET During System Initialization
Within the first 2 ms following the low-to-high transition of the RESET terminal, the serial data interface format
should be set in the serial data interface control register using the I
2
C serial control interface. If the data rate
setting is other than the setting specified by the DBSPD terminal, then the data rate should be set using the
DBSPD terminal or I
2
C interface within 2 ms following the low-to-high transition of the RESET terminal.
The time available to set the I
2
C registers following the low-to-high transition of the RESET terminal can be
extended using the ERR_RCVRY terminal. While ERR_RCVRY is low, the TAS5036A outputs are held
inactive. Once the I
2
C control registers are set, the ERR_RCVRY terminal can be released and the TAS5036A
starts operation. Figure 42 shows how the ERR_RCVRY terminal can be used to extend the interval as long
as necessary to set the I
2
C registers following the low-to-high transition of the RESET terminal.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TAS5036B_06 | Six Channel Digital Audio PWM Processor |
| TAS5036BPFCG4 | Six Channel Digital Audio PWM Processor |
| TAS5036BPFCR | Six Channel Digital Audio PWM Processor |
| TAS5036BPFCRG4 | Six Channel Digital Audio PWM Processor |
| TAS5100ADAP | Single Audio Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS5036B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Six Channel Digital Audio PWM Precessor |
| TAS5036B_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Six Channel Digital Audio PWM Processor |
| TAS5036BPFC | 功能描述:音頻 DSP Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS5036BPFCG4 | 功能描述:音頻 DSP Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS5036BPFCR | 功能描述:多媒體雜項 Dig Aud PWM Proc RoHS:否 制造商:Texas Instruments 類型: 通道數(shù)量: 轉(zhuǎn)換速率:540 Mbps 分辨率: 封裝 / 箱體:SOIC-16 封裝:Tube |
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