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參數資料
| 型號： | TAS5028APAGRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8 Channel Digital Audio PWM Processor |
| 中文描述： | 8通道數字音頻PWM處理器 |
| 文件頁數： | 55/82頁 |
| 文件大?。?/td> | 1226K |
| 代理商： | TAS5028APAGRG4 |
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Serial Control I
2
C Register Summary
49
SLES112 — June 2004
TAS5028A
5
Serial Control I
2
C Register Summary
The TAS5028A slave address is 0x36. See the
Serial Control I
2
C Register Bit Definitions
chapter for complete
bit definitions.
Note that u indicates unused bits.
I
2
C
SUBADDRESS
TOTAL
BYTES
REGISTER FIELDS
DESCRIPTION OF CONTENTS
DEFAULT STATE
0x00
1
Clock control register
Set data rate and MCLK frequency
1. Fs = 48 kHz
2. MCLK = 256 Fs = 12.288 MHz
0x01
1
General status register
Clip indicator and ID code for the
TAS5028A
0x01
0x02
1
Error status register
PLL, SCLK, LRCLK, and frame slip
errors
No errors
0x03
1
System control register 1
PWM high pass, clock set, un-mute
select
1. PWM high pass disabled
2. Auto clock set
3. Hard un-mute on clock error
recovery
1. Automute timeout disable
2. Post-DAP detection automute
enabled
3. 8-Ch device input detection
automute enabled
4. Un-mute threshold 6 dB over input
5. No de-emphasis
0x04
1
System control register 2
Automute and de-emphasis control
0x05–0x0C
1
Channel configuration registers
Configure channels 1, 2, 3, 4, 5, 6, 7,
and 8
1. Enable backend reset
2. Valid low for reset
3. Valid low for mute
4. Normal BEPolarity
5. Don’t remap the output for the
TAS5182
6. Don’t go low-low in mute
7. Don’t remap Hi-Z state to
low-low state
1. Disable backend reset sequence
2 Valid does not have to be low for
reset
3. Valid does not have to be low for
mute
4. Normal BEPolarity
5. Do not remap output to comply
with 5182
6. Do not go low-low in mute
7. Do not remap Hi
Z state to
low-low state
0x0D
1
Headphone configuration
register
Configure headphone output
0x0E
1
Serial data interface register
Set serial data interface to right
justified, I2S, or left justified
24-bit I2S
0x0F
1
Soft mute register
Soft mute for channels 1, 2, 3, 4, 5, 6,
7, and 8
Un-mute all channels
0x10–0x13
0x14
RESERVED
Set auto-mute delay and threshold
1
Automute control
1. Set auto-mute delay = 5 ms
2. Set auto-mute threshold less
than bit 8
0x15
1
Automute PWM threshold and
backend reset period
Set PWM auto-mute threshold, set
backend reset period
1. Set the PWM threshold the same
as the TAS5028A input threshold
2. Set backend reset
period = 5 ms
97.7%
0x16
1
Modulation limit register
Set modulation index
RESERVED
0x17–0x1A
相關PDF資料 |
PDF描述 |
|---|---|
| TAS5028PAGR | 8 Channel Digital Audio PWM Processor |
| TAS5028PAGRG4 | 8 Channel Digital Audio PWM Processor |
| TAS5036A | Six Channel Digital Audio PWM Processor |
| TAS5036A_06 | Six Channel Digital Audio PWM Processor |
| TAS5036AIPFC | Six Channel Digital Audio PWM Processor |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TAS5028PAG | 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| TAS5028PAGG4 | 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| TAS5028PAGR | 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| TAS5028PAGRG4 | 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| TAS5036 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SIX CHANNEL DIGITAL AUDIO PWM PROCESSOR |
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