參數(shù)資料
型號(hào): TAS5028APAGRG4
廠商: Texas Instruments, Inc.
英文描述: 8 Channel Digital Audio PWM Processor
中文描述: 8通道數(shù)字音頻PWM處理器
文件頁數(shù): 37/82頁
文件大?。?/td> 1226K
代理商: TAS5028APAGRG4
TAS5028A Controls and Status
30
SLES112 — June 2004
TAS5028A
2.3.3 Audio System Configurations
The TAS5028A can be configured to comply with various audio systems: 5.1-channel system, 6-channel
system, 7.1-channel system and 8-channel system.
The audio system configuration is set in the general control register (0xE0). Bits D31 – D2 must be zero and
D0 is don’t care.
D1
Sets number of speakers in the system, including possible line outputs
D1 must be configured as the following according to the audio system in the application:
Table 2
7. Audio System Configuration (General Control Register 0xE0)
AUDIO SYSTEM
DEFAULT
D31
D2
0
0
0
D1
0
1
0
D0
X
X
X
6 channel or 5.1
8 channel or 7.1
2.3.3.1
Using Line Outputs in 6-Channel Configurations
The audio system can be configured for a 6-channel configuration (with 2 line outs) by writing a 1 to bit D1
of register 0xE0 (General Control Register). In this configuration, channel 5 and 6 processing are exactly the
same as the other channels, except that Master Volume has no effect.
Note that in 6-channel configuration, channels 5 and 6 are unaffected by backend error (BKND_ERR goes
low).
To use channels 5 and 6 as dry unprocessed line outs, the following setup is recommended:
Channel 5 volume and channel 6 volume should be set for a constant output such as 0 dB.
Bass and treble for channels 5 and 6 can be used if desired.
If a down mix is desired on the channel 5 and 6 as line out, the down mixing can be performed using the
channel 5 and channel 6 input mixers.
2.3.4 Recovery from Clock Error
The TAS5028A can be set to either perform a volume ramp up during the recovery sequence of a clock error
or to simply come up in the last state (or desired state if a volume or tone update was in progress). This feature
is enabled via I
2
C system control register 0x03.
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