參數(shù)資料
型號(hào): TAS5028APAGRG4
廠商: Texas Instruments, Inc.
英文描述: 8 Channel Digital Audio PWM Processor
中文描述: 8通道數(shù)字音頻PWM處理器
文件頁(yè)數(shù): 22/82頁(yè)
文件大?。?/td> 1226K
代理商: TAS5028APAGRG4
Introduction
14
SLES112 — June 2004
TAS5028A
Bass and
Treble
Input Mixer
Trunc
PWM
Proc
Volume
A_to_ipmix
B_to_ipmix
A
B
SDIN1
D_to_ipmix
E_to_ipmix
C
D
SDIN2
F_to_ipmix
G_to_ipmix
E
F
SDIN3
H_to_ipmix
G
H
SDIN4
Left
Left
Left
Left
Right
Right
Right
Right
Channel
Volume
Master
Volume
Bass and Treble
Bypass
Bass and Treble
In-Line
Output
Gain
Output Mixer Sums
Any Two Or
Three Channels
PWM
Output
One or Two Other
Channel Outputs
From Seven Available
32-Bit
Figure 1
6. TAS5028A Detailed Channel Processing
1.5.2 I
2
C Coefficient Number Formats
The architecture of the TAS5028A is contained in ROM resources within the TAS5028A and cannot be altered.
However, mixer gain, level offset, and filter tap coefficients, which can be entered via the I
2
C bus interface,
provide a user with the flexibility to set the TAS5028A to a configuration that achieves the system level goals.
The firmware is executed in a 48-bit signed fixed-point arithmetic machine. The most significant bit of the 48-bit
data path is a sign bit, and the 47 lower bits are data bits. Mixer gain operations are implemented by multiplying
a 48-bit signed data value by a 28-bit signed gain coefficient. The 76-bit signed output product is then truncated
to a signed 48-bit number. Level offset operations are implemented by adding a 48-bit signed offset coefficient
to a 48-bit signed data value. In most cases, if the addition results in overflowing the 48-bit signed number
format, saturation logic is used. This means that if the summation results in a positive number that is greater
than 0x7FFF FFFF FFFF (the spaces are used to ease the reading of the hexadecimal number), the number
is set to 0x7FFF FFFF FFFF. If the summation results in a negative number that is less than
0x8000 0000 0000 0000, the number is set to 0x8000 0000 0000 0000.
1.5.2.1
28-Bit 5.23 Number Format
All mixer gain coefficients are 28-bit coefficients using a 5.23 number format. Numbers formatted as 5.23
numbers means that there are 5 bits to the left of the decimal point and 23 bits to the right of the decimal point.
This is shown in the Figure 1
7.
2
23
Bit
S_xxxx.xxxx_xxxx_xxxx_xxxx_xxx
2
4
Bit
2
1
Bit
2
0
Bit
Sign Bit
2
3
Bit
Figure 1
7. 5.23 Format
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