- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385871 > ST70135A (意法半導(dǎo)體) ASCOTTM DMT TRANSCEIVER PDF資料下載
參數(shù)資料
| 型號： | ST70135A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | ASCOTTM DMT TRANSCEIVER |
| 中文描述： | ASCOTTM大唐收發(fā)器 |
| 文件頁數(shù)： | 10/29頁 |
| 文件大小： | 198K |
| 代理商： | ST70135A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
ST70135A
10/29
I
I-PU
= Input, CMOS levels
= Input with pull-up resistance, CMOS
levels
= Input
with
pull-down
CMOS levels
= Input TTL levels
= Push-pull output
= Push-pull output with high-impedance
state
= Input / Tristate Push-pull output
BS cell = Boundary-Scan cell
I
= Input cell
O
= Output cell
B
= Bidirectional cell
C
= Clock
I-PD
resistance,
I-TTL
O
OZ
IO
Main Block Description
The following drawings describe the sequence of
functions performed by thechip.
DSP Front-End
The DSP Front-End contains 4 parts in the
receive direction: the Input Selector, the Analog
Front-End Interface, the Decimator and the Time
Equalizer. The input selector is used internally to
enable test loopbacks inside the chip. The Analog
Front-End
lnterface
transfers
multiplexed on 4 input/output signals. Word
transfer is carried out in 4 clock cycles.
The Decimator receives 16-bit samples at 8.8MHz
(as sent by the Analog Front-End chip: ST70134)
and reduces this rate to 2.2MHz.
Figure 3 :
DSP Front-End Receive
16-bit
words,
The Time Equalizer (TEQ) module is a FIR filter
with programmable coefficients. Its main purpose
is
to
reduce
the
effect
Interferences (ISI) by shortening the channel
impulse response. Both the Decimator and TEQ
can be bypassed. In the transmit direction, the
DSP
Front-End
includes:
clipping, delay equalization and interpolation. The
sidelobe filtering and delay equalization are
implemented by IIR Filters, reducing the effect of
echo in FDM systems. Clipping is a statistical
process limiting the amplitude of the output signal,
optimizing the dynamic range of the AFE. The
interpolator
receives
data
generates samples at a rate of 8.8MHz.
of
Inter-Symbol
sidelobe
filtering,
at
2.2MHz
and
DMT Modem
This module is a programmable DSP unit. Its
instruction set enables the basic functions of the
DMT algorithm like FFT, IFFT, Scaling, Rotor and
Frequency Equalization (FEQ) in compliance with
ANSI T1.413 specifications.
In the RX path, the 512-point FFT transforms the
time-domain
DMT
symbol
domain representation which can be further
decoded by the subsequent demapping stages.
into
a frequency
In other words, the Fast Fourier Transform process
is used to transform from time domain to frequency
domain (receive path). 1024 time samples are
processed. After the first stage time domain
equalization and FFT block an ICI (InterCarrier
Interference) freeinformation stream turns out.
Figure 4 :
DSP Front-End Transmit
From
Analog
Front-end
IN
SELECT
AFE
I/F
DEC
TEC
BYPASS
To DMT
Modem
From
DMT
Modem
FILTERING
CLIPPING
DELAY
EQUALIZER
AFE
I/F
To Analog
Front End
OUT
SELECT
INTER-
POLATOR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST70136 | CPE ADSL ANALOG FRONT END |
| ST70136B | CPE ADSL ANALOG FRONT END |
| ST70136G | CPE ADSL ANALOG FRONT END |
| ST70137 | UNICORNTM PCI & USB CONTROLLERLESS ADSL DMT TRANSCEIVER |
| ST70137TQFP | UNICORNTM PCI & USB CONTROLLERLESS ADSL DMT TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST70136 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:CPE ADSL ANALOG FRONT END |
| ST70136B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:CPE ADSL ANALOG FRONT END |
| ST70136G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:CPE ADSL ANALOG FRONT END |
| ST70136Q | 功能描述:射頻無線雜項 ADSL Analg Front-End RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| ST70137 | 制造商:STMicroelectronics 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。