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參數(shù)資料
| 型號： | ST62E18C |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 16-Bit Registered Transceivers With 3-State Outputs 56-SSOP -40 to 85 |
| 中文描述： | 8位單片機與微控制器/ D轉(zhuǎn)換器，自動重加載定時器，UART的秘書長辦公室，安全復(fù)位和20管腳封裝 |
| 文件頁數(shù)： | 10/82頁 |
| 文件大?。?/td> | 536K |
| 代理商： | ST62E18C |
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ST62T18C/E18C
MEMORY MAP
(Cont’d)
1.3.3 Data Space
Data Space accommodates all the data necessary
for processing the user program. This space com-
prises the RAM resource, the processor core and
peripheral registers, as well as read-only data
such as constants and look-up tables in Program
memory.
1.3.3.1 Data ROM
All read-only data is physically stored in program
memory, which also accommodates the Program
Space. The program memory consequently con-
tains the program code to be executed, as well as
the constants and look-up tables required by the
application.
The Data Space locations in which the different
constants and look-up tables are addressedby the
processor core may be thought of as a 64-byte
window through which it is possible to access the
read-only data stored in Program memory.
1.3.3.2 Data RAM
In ST62T18C and ST62E18C devices, the data
space includes 60 bytes of RAM, the accumulator
(A), the indirect registers (X), (Y), the short direct
registers (V), (W), the I/O port registers, the pe-
ripheral data and control registers, the interrupt
option register and theData ROM Window register
(DRW register).
Additional RAM pages can also be addressed us-
ing banks of 64 bytes located between addresses
00h and 3Fh.
1.3.4 Stack Space
Stack space consists of six 12-bit registers which
are used to stack subroutine and interrupt return
addresses, as well as thecurrent program counter
contents.
Table 3. Additional RAM Banks
Table 4. ST62T18C/E18C Data Memory Space
Device
RAM
ST62T18C/E18C
2 x 64 bytes
DATARAM BANKS
000h
03Fh
040h
07Fh
080h
081h
082h
083h
084h
0BFh
0C0h
0C1h
0C2h
0C3h
0C4h
0C5h
0C6h
0C7h
0C8h*
0C9h*
0CAh*
0CBh*
0CCh
0CDh
0CEh
0CFh
0D0h
0D1h
0D2h
0D3h
0D4h
0D5h
0D6h
0D7h
0D8h
0D9h
0DAh
0DCh*
0DDh
0DEh
0E4h
0E5h
0E6h
0E7h
0E8h
0E9h
0EAh
0EBh
0ECh
OFFh
DATAROM WINDOW AREA
X REGISTER
Y REGISTER
V REGISTER
W REGISTER
DATA RAM
PORT A DATA REGISTER
PORT B DATA REGISTER
RESERVED
PORT D DATAREGISTER
PORT A DIRECTION REGISTER
PORT B DIRECTION REGISTER
RESERVED
PORT D DIRECTION REGISTER
INTERRUPT OPTION REGISTER
DATA ROM WINDOWREGISTER
ROM BANK SELECT REGISTER
RAM BANK SELECT REGISTER
PORT A OPTION REGISTER
PORT B OPTION REGISTER
RESERVED
PORT D OPTION REGISTER
A/D DATA REGISTER
A/D CONTROL REGISTER
TIMER 1 PRESCALER REGISTER
TIMER 1 COUNTER REGISTER
TIMER 1 STATUS/CONTROL REGISTER
RESERVED
UARTDATA SHIFT REGISTER
UARTSTATUS CONTROL REGISTER
WATCHDOG REGISTER
RESERVED
I/O INTERRUPTPOLARITY REGISTER
RESERVED
RESERVED
RESERVED
ARTIMER MODE/CONTROL REGISTER
ARTIMER STATUS/CONTROL REGISTER ARSC0
ARTIMER STATUS/CONTROL REGISTER ARSC1
RESERVED
ARTIMER RELOAD/CAPTURE REGISTER
ARTIMER COMPARE REGISTER
. ARTIMER LOAD REGISTER
RESERVED
ACCUMULATOR
* WRITE ONLY REGISTER
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