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參數(shù)資料
| 型號(hào)： | ST6240B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Replaced by PT6302 : 5Vout 3A Wide Input Positive Step-Down ISR 3-SIP MODULE -40 to 70 |
| 中文描述： | 8位檢察官辦公室/存儲(chǔ)器與LCD驅(qū)動(dòng)器，EEPROM和一個(gè)微處理器/ D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 17/76頁 |
| 文件大?。?/td> | 1280K |
| 代理商： | ST6240B |
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ST62T40B/E40B
CPU REGISTERS
(Cont’d)
However, if the program space contains more than
4096 bytes, the additional memory in program
space can be addressed by using the Program
Bank Switch register.
The PC value is incremented after reading the ad-
dress of the current instruction. To execute relative
jumps, the PC and the offset are shifted through
the ALU, where they are added; the result is then
shifted back into the PC. The program counter can
be changed in the following ways:
- JP (Jump) instructionPC=Jump address
- CALL instructionPC= Call address
- Relative Branch Instruction.PC= PC +/- offset
- Interrupt
PC=Interrupt vector
- Reset
PC= Reset vector
- RET & RETI instructionsPC= Pop (stack)
- Normal instructionPC= PC + 1
Flags (C, Z)
. The ST6 CPU includes three pairs of
flags (Carry and Zero), each pair being associated
with one of the three normal modes of operation:
Normal mode, Interrupt mode and Non Maskable
Interrupt mode. Each pair consists of a CARRY
flag and a ZERO flag. One pair (CN, ZN) is used
during Normal operation, another pair is used dur-
ing Interrupt mode (CI, ZI), and a third pair is used
in the Non Maskable Interrupt mode (CNMI, ZN-
MI).
The ST6 CPU uses the pair of flags associated
with the current mode: as soon as an interrupt (or
a Non Maskable Interrupt) is generated, the ST6
CPU uses the Interrupt flags (resp. the NMI flags)
instead of the Normal flags. When the RETI in-
struction is executed, the previously used set of
flags is restored. It should be noted that each flag
set can only be addressed in its own context (Non
Maskable Interrupt, Normal Interrupt or Main rou-
tine). The flags are not cleared during context
switching and thus retain their status.
The Carry flag is set when a carry or a borrow oc-
curs during arithmetic operations; otherwise it is
cleared. The Carry flag is also set to the value of
the bit tested in a bit test instruction; it also partici-
pates in the rotate left instruction.
The Zero flag is set if the result of the last arithme-
tic or logical operation was equal to zero; other-
wise it is cleared.
Switching between the three sets of flags is per-
formed automatically when an NMI, an interrupt or
a RETI instructions occurs. As the NMI mode is
automatically selected after the reset of the MCU,
the ST6 core uses at first the NMI flags.
Stack.
The ST6 CPU includes a true LIFO hard-
ware stack which eliminates the need for a stack
pointer. The stack consists of six separate 12-bit
RAM locations that do not belong to the data
space RAM area. When a subroutine call (or inter-
rupt request) occurs, the contents of each level are
shifted into the next higher level, while the content
of the PC is shifted into the first level (the original
contents of the sixth stack level are lost). When a
subroutine or interrupt return occurs (RET or RETI
instructions), the first level register is shifted back
into the PC and the value of each level is popped
back into the previous level. Since the accumula-
tor, in common with all other data space registers,
is not stored in this stack, management of these
registers should be performed within the subrou-
tine. The stack will remain in its “deepest” position
if more than 6 nested calls or interrupts are execut-
ed, and consequently the last return address will
be lost. It will also remain in its highest position if
the stack is empty and a RET or RETI is executed.
In this case the next instruction will be executed.
Figure 7. ST6 CPU Programming Mode
l
SHORT
DIRECT
ADDRESSING
MODE
V REGISTER
W REGISTER
PROGRAM COUNTER
SIX LEVELS
STACK REGISTER
C
Z
NORMAL FLAGS
INTERRUPT FLAGS
NMI FLAGS
INDEX
REGISTER
VA000423
b7
b7
b7
b7
b7
b0
b0
b0
b0
b0
b0
b11
ACCUMULATOR
Y REG. POINTER
X REG. POINTER
C
Z
C
Z
589
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST6240B-EMU2 | 功能描述:仿真器/模擬器 ST62 Emulator Board RoHS:否 制造商:Blackhawk 產(chǎn)品:System Trace Emulators 工具用于評(píng)估:C6000, C5000, C2000, OMAP, DAVINCI, SITARA, TMS470, TMS570, ARM 7/9, ARM Cortex A8/R4/M3 用于:XDS560v2 |
| ST6240BQ1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. LCD DRIVER. EEPROM. A/D CONVERTER AND 80 PINS |
| ST6240BQ1/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| ST6240BQ6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. LCD DRIVER. EEPROM. A/D CONVERTER AND 80 PINS |
| ST6240BQ6/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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