參數(shù)資料
型號： ST52514K3
英文描述： IC MAX 7000 CPLD 256 100-TQFP
中文描述： 8位重癥監(jiān)護病房，10位ADC。兩個定時器/脈寬調(diào)制。 I2C總線。的SPI。脊髓損傷。提供了8K閃存
文件頁數(shù)： 95/106頁
文件大?。?/td> 1355K
代理商： ST52514K3
Figure 13.3 Transfer Sequencing
7-bit Slave receiver:
7-bit Slave transmitter:
7-bit Master receiver:
7-bit Master transmitter:
10-bit Slave receiver:
10-bit Slave transmitter:
10-bit Master transmitter:
10-bit Master receiver:
Legend:
S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge
EVx=Event (with interrupt if ITE=1)
EV1: EVF=1, ADSL=1, cleared by reading I2C_SR1 register.
EV2: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by reading I2C_IN register.
EV3: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.
EV3-1: EVF=1, AF=1, BTF=1, SCL=0; AF is cleared by reading I2C_SR2. BTF is cleared
by releasing the lines (STOP=1,STOP=0) or by readyng I2C_SR1 and writing I2C_OUT register
(I2C_OUT=FFh).Note: If lines are released by STOP=1, STOP=0, the subsequent EV4 is not seen
EV4: EVF=1, STOPF=1, cleared by reading I2C_SR2 register.
EV5: EVF=1, SB=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.
EV6: EVF=1, cleared by reading I2C_SR1 register followed by writing I2C_CR (for example PE=1
EV7: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by reading I2C_IIN register.
EV8: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.
EV9: EVF=1, ADD10=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT registe
S Address A
Data1
A
Data2
A
.....
DataN
A
P
EV1
EV2
EV4
S Address A
Data1
A
Data2
A
.....
DataN
NA
P
EV1 EV3
EV3
EV3-1
EV4
S
Address
A
Data1
A
Data2
A
.....
DataN
NA
P
EV5
EV6
EV7
S
Address
A
Data1
A
Data2
A
.....
DataN
A
P
EV5
EV6 EV8
EV8
S Header
A
Address A
Data1
A
.....
DataN
A
P
EV1
EV2
EV4
Sr Header
A
Data1
A
.....
DataN
A
P
EV1 EV3
EV3
EV3-1
EV4
S
Header
A
Address A
Data1
A
.....
DataN
A
P
EV5
EV9
EV6 EV8
EV8
Sr
Header
A
Data1
A
.....
DataN
A
P
EV5
EV6
EV7
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