參數(shù)資料
型號： ST52514K3
英文描述： IC MAX 7000 CPLD 256 100-TQFP
中文描述： 8位重癥監(jiān)護(hù)病房，10位ADC。兩個定時器/脈寬調(diào)制。 I2C總線。的SPI。脊髓損傷。提供了8K閃存
文件頁數(shù)： 73/106頁
文件大小： 1355K
代理商： ST52514K3
Figure 11.4 PWM Mode with Reload
Reload determines the maximum value that the
counter can count before starting a new period. By
setting the Reload value the counting resolution
decreases. In order to obtain the maximum
resolution, Reload value should be set to 0FFh and
the period corresponds to the one established by
the Prescaler value.
The value set in the 8-bit counter by writing the
Counter Output Register, determines the duty-
cycle: when count reaches the Counter value the
TxOUT signal changes from high to low level.
The period of the PWM signal is obtained by using
the following formula:
T=PWMx-RELOAD * 2
TxPRESC * TMRCLKx
where TxPRESC equals the value set in the
TxPRESC bits of the PWMx_CR2 Configuration
Register and TMRCLKx is the period of the Timer
clock that drives the Prescaler.
The duty cycle of the PWM signal is obtained by
the following formula:
Note: the PWM_x_COUNT value must be lower
than or equal to the PWM_X_RELOAD
value.
When it is equal, the TxOUT signal is always at
high level. If the Output Register PWM_x_COUNT
is 0, TxOUT signal is always at a low level.
By using a 24 MHz clock a PWM frequency that is
close to 100 Khz can be obtained.
The TIMER0 clock CLKM can also be supplied
with an external signal, applied on the TCLK pin,
which must have a frequency that is at least two
times smaller than the internal master clock.
Note: the Timers have to complete the previous
counting phase before using a new value of the
Counter. If the Counter value is changed during
counting, the new values of the timer Counter are
only used at the end of the previous counting
phase. Nevertheless, it is recommended that the
Reload value be written when the Timer is stopped
in order to avoid incongruence with the Counter
value. A Reload value greater than 1 must always
be used.
When the Timers are in Reset status, or when the
device is reset, the TxOUT pins goes in threestate.
If these outputs are used to drive external devices,
it is recommended that the related pins be left in
the default configuration (Input threestate) or
change them in this configuration.
In PWM mode the PWM/Timers can only be Set or
Reset: Start/Stop signals do not affect the Timers.
TxRES resets the content of the 8-bit counter to
zero.
It
is
generated
by
writing
0
in
the
corresponding TxRES bit of the PWMx_CR1
Configuration Register and/or it can be driven by
the TRES pin if it is configured (only Timer0).
t
255
compare
value
reload
register
0
PWM
Output
Ton
T
d
cycle
T
on
T
--------
PWMxCOUNT
PWMxRELOAD
------------------------------------------
==
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