參數(shù)資料
型號: ST52440G3
英文描述: MAX 7000 CPLD 64 MC 44-TQFP
中文描述: 8位重癥監(jiān)護(hù)病房與定時器/脈寬調(diào)制。模擬比較器??煽毓? PWM定時器。水分散粒劑。提供了8K存儲器
文件頁數(shù): 73/88頁
文件大?。?/td> 1162K
代理商: ST52440G3
ST52T430/E430
75/88
12.7 ESD Pin Protection Strategy
In order to protect an integrated circuit against
Electro-Static Discharge the stress must be
controlled to prevent degradation or destruction of
the circuit elements. Stress generally affects the
circuit elements, which are connected to the pads
but can also affect the internal devices when the
supply pads receive the stress. The elements that
are to be protected must not receive excessive
current, voltage, or heating within their structure.
An ESD network combines the different input and
output protections. This network works by allowing
safe discharge paths for the pins subject to ESD
stress.
Two
critical
ESD
stress
cases
are
presented in Figure 12.8 and Figure 12.9 for
standard pins.
12.7.1 Standard Pin Protection
In order to protect the output structure the following
elements are added:
- A diode to VDD (3a) and a diode from VSS (3b)
- A protection device between VDD and VSS (4)
In order protect the input structure the following
elements are added:
- A resistor in series with pad (1)
- A diode to VDD (2a) and a diode from VSS (2b)
- A protection device between VDD and VSS (4)
Figure 12.8 Safe discharge path subjected to ESD stress
Figure 12.9 Negative Stress on a Standard Pad vs. VDD
OU T
(4 )
IN
VD D
VS S
VD D
VS S
(2 a)
(2 b)
(3 a)
(3 b)
(1 )
M ain path
P ath to avoid
Main path
VSS
VDD
OUT
(3b)
(4)
IN
(3a)
(2b)
(1)
VSS
(2a)
VDD
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