參數(shù)資料
型號(hào)： ST52440G3
英文描述： MAX 7000 CPLD 64 MC 44-TQFP
中文描述： 8位重癥監(jiān)護(hù)病房與定時(shí)器/脈寬調(diào)制。模擬比較器?？煽毓? PWM定時(shí)器。水分散粒劑。提供了8K存儲(chǔ)器
文件頁(yè)數(shù)： 39/88頁(yè)
文件大?。?/td> 1162K
代理商： ST52440G3
Example 1:
IF Input1 IS NOT Mbf1 AND Input4 is Mbf12 OR Input3 IS Mbf8 THEN Crisp1
is codified by the following instructions:
Example 2, the priority of the operator is fixed by the brackets:
IF (Input3 IS Mbf1 AND Input4 IS NOT Mbf15) OR (Input1 IS Mbf6 OR Input6 IS NOT Mbf14) THEN Crisp2
At the end of the fuzzy rule, by using the instruction OUT
RAM_reg, a byte is written. Afterwards, the
control of the algorithm returns to the CU.
LDN 1 1
calculates the NOT
α value of Input
1 with Mbf1 and stores the result in internal registers
LDP 4 12
fixes the
α value of Input
4 with Mbf12 and stores the result in internal registers
FZAND
implements the operation AND between the results obtained with the previous instructions
LDK
stores the result of the previous operation in internal DPU registers
LDP 3 8
fixes the
α value of Input
3 with Mbf8 and stores the result in internal registers
FZOR
implements the operation OR between the results obtained with the previous instructions
CON
crisp1 multiplies the result of the last operation with the crisp value crisp1
LDP 3 1
fixes the
α value of Input
3 with Mbf1 and stores the result in internal registers
LDN 4 15
calculates the NOT
α value of Input
4 with Mbf15 and stores the result in internal registers
FZAND
implements the operation AND between the results obtained with the previous instructions
SKM
stores the result of the previous operation in register M
LDP 1 6
fixes the
α value of Input
1 with Mbf6 and stores the result in internal registers
LDN 2 14
calculates the NOT
α value of Input
6 with Mbf14 and stores the result in internal registers
FZOR
implements the operation OR between the results obtained with the previous instructions
LDK
stores the result of the previous operation in internal DPU registers
LDM
copies the value of the register M in internal DPU registers
FZOR
implements the operation OR between the last two values stored in DPU registers
CON
crisp2 multiplies the result of the last operation with the crisp value crisp2
相關(guān)PDF資料
PDF描述
ST52501LF1 MAX 7000 CPLD 128 MC 84-PLCC
ST52501LF2 MAX 7000 CPLD 128 MC 100-TQFP
ST52501LF3 MAX 7000 CPLD 128 MC 100-PQFP
ST52501LG1 MAX 7000 CPLD 128 MC 160-PQFP
ST52501LG2 MAX 7000 CPLD 128 MC 100-TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ST525 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | BJT | NPN | 200V V(BR)CEO | 5A I(C) | TO-3
ST52501LF1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE
ST52501LF2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE
ST52501LF3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH IR DRIVER. TIMER/PWM. I2C. SPI. SCI. LOW VOLTAGE
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