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參數(shù)資料
| 型號： | ST16C554DIQ64 |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUAD UART WITH 16-BYTE FIFOS |
| 中文描述： | 4 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64 |
| 文件頁數(shù)： | 12/40頁 |
| 文件大?。?/td> | 518K |
| 代理商： | ST16C554DIQ64 |
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ST16C554/554D/68C554
12
Rev. 3.10
The 68 Mode Interface
The 68 mode configures the package interface pins for
connection with Motorola, and other popular micro-
processor bus types. The interface operates similar to
the 68C454/554. In this mode the 554D decodes two
additional addresses, A3-A4 to select one of the four
UART ports. The A3-A4 address decode function is
used only when in the 68 mode (16/-68 logic 0), and is
shown in Table 3 below.
Table 3, SERIAL PORT CHANNEL SELECTION
GUIDE, 68 MODE INTERFACE
-CS
A4
A3
UART
CHANNEL
1
0
0
0
0
N/A
0
0
1
1
N/A
0
1
0
1
None
A
B
C
D
Internal Registers
The 554D provides 13 internal registers for monitoring
and control. These resisters are shown in Table 4
below. Twelve registers are similar to those already
available in the standard 16C454. These registers
function as data holding registers (THR/RHR), inter-
rupt status and control registers (IER/ISR), line status
and control registers (LCR/LSR), modem status and
control registers (MCR/MSR), programmable data
rate (clock) control registers (DLL/DLM), and a user
assessable scratchpad register (SPR). Register func-
tions are more fully described in the following para-
graphs.
Table 4, INTERNAL REGISTER DECODE
A2
A1
A0
READ MODE
WRITE MODE
General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR):
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Receive Holding Register
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
Interrupt Status Register
Line Status Register
Modem Status Register
Scratchpad Register
Scratchpad Register
Baud Rate Register Set (DLL/DLM): Note *2
0
0
0
0
0
1
LSB of Divisor Latch
MSB of Divisor Latch
LSB of Divisor Latch
MSB of Divisor Latch
Note *2: These registers are accessible only when LCR bit-7 is set to a logic 1.
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PDF描述 |
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| ST16C554CQ64 | Linear Voltage Regulator IC; Output Current Max:350mA; Supply Voltage Max:6V; Package/Case:8-TSSOP; Current Rating:350mA; Leaded Process Compatible:No; Output Voltage Max:2.8V; Peak Reflow Compatible (260 C):No |
| ST16C554DCQ64 | QUAD UART WITH 16-BYTE FIFOS |
| ST16C554 | Quad UART with 16-Byte FIFO(四通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| ST16C554D | Quad UART with 16-Byte FIFO(四通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| ST16C580 | UART WITH 16-BYTE FIFO’s AND INFRARED (IrDA) ENCODER/DECODER |
相關(guān)代理商/技術(shù)參數(shù) |
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| ST16C554DIQ64-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C554DIQ64TR-F | 功能描述:UART 接口集成電路 QUAD UART W/16 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C554ECQ64 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| ST16C554EDCJ68 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| ST16C554EDCQ64 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
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