參數(shù)資料
型號: ST16C554DIQ64
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: QUAD UART WITH 16-BYTE FIFOS
中文描述: 4 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64
文件頁數(shù): 10/40頁
文件大小: 518K
代理商: ST16C554DIQ64
ST16C554/554D/68C554
10
Rev. 3.10
Symbol
Pin
Signal
type
Pin Description
68
64
SYMBOL DESCRIPTION
-RI A-B
-RI C-D
8,28
42,62
63,19
30,50
I
Ring Indicator (active low) - These inputs are associated
with individual UART channels, A through D. A logic 0 on
this pin indicates the modem has received a ringing signal
from the telephone line. A logic 1 transition on this input pin
will generate an interrupt.
-RTS A-B
-RTS C-D
14,22
48,56
5,13
36,44
O
Request to Send (active low) - These outputs are associated
with individual UART channels, A through D. A logic 0 on the
-RTS pin indicates the transmitter has data ready and
waiting to send. Writing a logic 1 in the modem control
register (MCR bit-1) will set this pin to a logic 0 indicating
data is available. After a reset this pin will be set to a logic
1. This pin has no effect on the UARTs transmit or receive
operation.
RX A-B
RX C-D
7,29
41,63
62,20
29,51
I
Receive Data Input RX A-D. - These inputs are associated
with individual serial channel data to the ST16C554D. The
RX signal will be a logic 1 during reset, idle (no data), or
when the transmitter is disabled. During the local loopback
mode, the RX input pin is disabled and TX data is internally
connected to the UART RX Input, internally.
TX A-B
TX C-D
17,19
51,53
8,10
39,41
O
Transmit Data - These outputs are associated with indi-
vidual serial transmit channel data from the 554D. The TX
signal will be a logic 1 during reset, idle (no data), or when
the transmitter is disabled. During the local loopback mode,
the TX input pin is disabled and TX data is internally
connected to the UART RX Input.
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