- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383837 > ST16C550 (Exar Corporation) UART with 16-Byte FIFO(通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) PDF資料下載
參數(shù)資料
| 型號(hào)： | ST16C550 |
| 廠商： | Exar Corporation |
| 英文描述： | UART with 16-Byte FIFO(通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）) |
| 中文描述： | 的UART具有16字節(jié)FIFO（通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出）） |
| 文件頁數(shù)： | 18/36頁 |
| 文件大小： | 235K |
| 代理商： | ST16C550 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
ST16C550
18
Rev. 4.20
LCR BIT-6:
When enabled the Break control bit causes a break
condition to be transmitted (the TX output is forced to a
logic 0 state). This condition exists until disabled by
setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition. (normal default
condition)
Logic 1 = Forces the transmitter output (TX) to a logic
0 for alerting the remote receiver to a line break
condition.
LCR BIT-7:
The internal baud rate counter latch and Enhance
Feature mode enable.
Logic 0 = Divisor latch disabled. (normal default condi-
tion)
Logic 1 = Divisor latch and enhanced feature register
enabled.
Modem Control Register (MCR)
This register controls the interface with the modem or
a peripheral device.
MCR BIT-0:
Logic 0 = Force -DTR output to a logic 1. (normal
default condition)
Logic 1 = Force -DTR output to a logic 0.
MCR BIT-1:
Logic 0 = Force -RTS output to a logic 1. (normal
default condition)
Logic 1 = Force -RTS output to a logic 0.
MCR BIT-2:
Logic 0 = Set -OP1 output to a logic 1. (normal default
condition)
Logic 1 = Set -OP1 output to a logic 0.
MCR BIT-3:
Logic 0 = Set -OP2 output to a logic 1. (normal default
condition)
Logic 1 = Set -OP2 output to a logic 0.
MCR BIT-4:
Logic 0 = Disable loop-back mode. (normal default
condition)
Logic 1 = Enable local loop-back mode (diagnostics).
MCR BIT 5-7:Not used and set to “0”.
Line Status Register (LSR)
This register provides the status of data transfers
between. the ST16C550 and the CPU.
LSR BIT-0:
Logic 0 = No data in receive holding register or FIFO.
(normal default condition)
Logic 1 = Data has been received and is saved in the
receive holding register or FIFO.
LSR BIT-1:
Logic 0 = No overrun error. (normal default condition)
Logic 1 = Overrun error. A data overrun error occurred
in the receive shift register. This happens when addi-
tional data arrives while the FIFO is full. In this case
the previous data in the shift register is overwritten.
Note that under this condition the data byte in the
receive shift register is not transfer into the FIFO,
therefore the data in the FIFO is not corrupted by the
error.
LSR BIT-2:
Logic 0 = No parity error (normal default condition)
Logic 1 = Parity error. The receive character does not
have correct parity information and is suspect. In the
FIFO mode, this error is associated with the character
at the top of the FIFO.
LSR BIT-3:
Logic 0 = No framing error (normal default condition).
Logic 1 = Framing error. The receive character did not
have a valid stop bit(s). In the FIFO mode this error is
associated with the character at the top of the FIFO.
LSR BIT-4:
Logic 0 = No break condition (normal default condi-
tion)
Logic 1 = The receiver received a break signal (RX
was a logic 0 for one character frame time). In the
FIFO mode, only one break character is loaded into
the FIFO.
LSR BIT-5:
This bit is the Transmit Holding Register Empty indi-
cator. This bit indicates that the UART is ready to
accept a new character for transmission. In addition,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C552 | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）) |
| ST16C552A | Dual UART with 16-Byte FIFO and Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶16字節(jié)的先進(jìn)先出和并行打印機(jī)端口）) |
| ST16C554DCJ68 | QUAD UART WITH 16-BYTE FIFOS |
| ST68C554 | QUAD UART WITH 16-BYTE FIFOS |
| ST16C554DIJ68 | Plug-In Relay; Contacts:DPDT; Contact Carry Current:15A; Coil Voltage AC Max:120V; Relay Mounting:Plug-In; Relay Terminals:Quick Connect; Coil Resistance:4430ohm RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C550_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:UART WITH 16-BYTE FIFO’s |
| ST16C550CJ44 | 制造商:Exar 功能描述:Bulk |
| ST16C550CJ44-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C550CJ44TR-F | 功能描述:UART 接口集成電路 SNGL UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C550CP40 | 功能描述:UART 接口集成電路 SINGLE UART W/16 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。