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參數(shù)資料
| 型號： | SMJ320C6201BGLE |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 54/73頁 |
| 文件大?。?/td> | 1093K |
| 代理商： | SMJ320C6201BGLE |
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SM320C6201, SMJ320C6201B
DIGITAL SIGNAL PROCESSORS
SGUS028A – NOVEMBER 1998 – REVISED JANUARY 1999
54
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
switching characteristics for McBSP
(see Figure 32)
NO.
PARAMETER
’C6201-150
’C6201B-150
’C6201B-200
UNIT
MIN
MAX
MIN
MAX
1
td(CKSH-CKRXH)
Delay time, CLKS high to CLKR/X
high for internal
CLKR/X generated from CLKS
input
4*
15*
4
10
ns
2
tc(CKRX)
Cycle time, CLKR/X
CLKR/X int
2*
2
CLKOUT1
cycles
3
tw(CKRX)
Pulse duration, CLKR/X high or
CLKR/X low
CLKR/X int
C – 1*
C + 1*
C – 1
C + 1
ns
4
td(CKRH-FRV)
Delay time, CLKR high to internal
FSR valid
CLKR int
–2*
4.5*
–2
3
ns
9
td(CKXH FXV)
td(CKXH-FXV)
Delay time, CLKX high to internal
FSX valid
CLKX int
0*
4*
–2
3
ns
CLKX ext
3*
16
3
9
12
tdi (CKXH DXHZ)
tdis(CKXH-DXHZ)
Disable time, DX high impedance
following last data bit from CLKX
high
CLKX int
0*
4*
–1
4
ns
CLKX ext
3*
16*
3
9
13
td(CKXH DXV)
td(CKXH-DXV)
Delay time, CLKX high to DX valid
This is also specified by design but
not tested to be the delay time for
data to be low impedance on the
first data bit.
CLKX int
0*
4*
–1
4
ns
CLKX ext
3*
16
3
9
14
td(FXH DXV)
td(FXH-DXV)
Delay time, FSX high to DX valid
This is also specified by design but
not tested to be the delay time for
data to be low impedance on the
first data bit.
FSX int
–2*
4*
–1
3
ns
ONLY applies when in data
delay 0 (XDATDLY = 00b) mode
FSX ext
3*
16*
3
9
CLKRP = CLKXP = FSRP = FSXP = 0. If polarity of any of the signals is inverted, then the timing references of that signal are also inverted.
Minimum delay times also represent minimum output hold times.
*This parameter is not production tested.
C =
H or L
H =
CLKX high pulse width = (CLKGDV/2 + 1) * T
L =
CLKX low pulse width = (CLKGDV/2) * T
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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