參數(shù)資料
型號： SM320C6701GJCA16EP
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 32-BIT, 166.67 MHz, OTHER DSP, PBGA352
封裝： 35 X 35 MM, PLASTIC, BGA-352
文件頁數(shù)： 19/62頁
文件大?。?/td> 894K
代理商： SM320C6701GJCA16EP
SM320C6701EP, SM320C6701MECHEP
FLOATINGPOINT DIGITAL SIGNAL PROCESSOR
SGUS042A MAY 1998 REVISED APRIL 2004
26
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
absolute maximum ratings over operating case temperature range (unless otherwise noted)
Supply voltage range, CVDD (see Note 1)
0.3 V to 2.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, DVDD (see Note 1)
0.3 V to 4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range
0.3 V to 4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range
0.3 V to 4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating case temperature range, TC (Default)
0
_C to 90_C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(A Version)
40
_C to 105_C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
55
_C to 150_C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.
recommended operating conditions
MIN
NOM
MAX
UNIT
CVDD
Supply voltage, Core
6701-120
1.71
1.8
1.89
V
CVDD
Supply voltage, Core
6701-167
1.81
1.9
1.99
V
DVDD
Supply voltage, I/O
3.14
3.30
3.46
V
VSS
Supply ground
0
V
VIH
High-level input voltage
2.0
V
VIL
Low-level input voltage
0.8
V
IOH
High-level output current
12
mA
IOL
Low-level output current
12
mA
TC
Case temperature
Default
0
90
_C
TC
Case temperature
A Version
40
105
_C
TI DSP’s do not require specific power sequencing between the core supply and the I/O supply. However, systems should be designed to ensure
that neither supply is powered up for extended periods of time if the other supply is below the proper operating voltage. Excessive exposure to
these conditions can adversely affect the long term reliability of the device. System-level concerns such as bus contention may require supply
sequencing to be implemented. In this case, the core supply should be powered up at the same time as, or prior to (and powered down after),
the I/O buffers. For additional power supply sequencing information, see the Power Supply Sequencing Solutions For Dual Supply Voltage DSPs
application report (literature number SLVA073).
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
DVDD = MIN,
IOH = MAX
2.4
V
VOL
Low-level output voltage
DVDD = MIN,
IOL = MAX
0.6
V
II
Input current
VI = VSS to DVDD
±10
uA
IOZ
Off-state output current
VO = DVDD or 0 V
±10
uA
IDD2V
Supply current, CPU + CPU memory access
CVDD = NOM, CPU clock = 120 MHz
380
mA
IDD2V
Supply current, peripherals
CVDD = NOM, CPU clock = 120 MHz
200
mA
IDD3V
Supply current, I/O pins
DVDD = NOM, CPU clock = 120 MHz
70
mA
Ci
Input capacitance
10
pF
Co
Output capacitance
10
pF
TMS and TDI are not included due to internal pullups.
TRST is not included due to internal pulldown.
Measured with average activity (50% high / 50% low power). For more detailed information on CPU/peripheral/I/O activity, see the TMS320C6000
Power Consumption Summary application report (literature number SPRA486).
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