參數(shù)資料
型號: SAF82526
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 82/126頁
文件大?。?/td> 730K
代理商: SAF82526
Semiconductor Group
82
SAB 82525
SAB 82526
SAF 82525
SAF 82526
Interrupt Status Register (READ)
ISTA
(20/60)
RME
RPF
RSC
XPR
TIN
ICA
EXA
EXB
7
0
Value after RESET: 00
H
RME. . .Receive Message End
One message up to 32 bytes or the last part of a message greater then 32 bytes has
been received and is now available in the RFIFO. The message is complete!
The actual message length can be determined reading the RBCH, RBCL registers.
Additional information is available in the RSTA register.
RPF. . .Receive Pool Full
A block of 32 bytes of a message is stored in the RFIFO. The message is not yet
completed!
Note:
This interrupt is only generated in Interrupt Mode!
RSC. . .Receive Status Change (significant in auto-mode only!)
A status change (receiver ready/receiver not ready) of the opposite station has been
detected in auto-mode. (i.e. the HSCX has received a RR/RNR supervisory frame
according to the HDLC protocol.) The current status can be read from the STAR
register (RRNR bit).
XPR. . .Transmit Pool Ready
A data block of up to 32 bytes can be written to the transmit FIFO.
TIN. . .Timer Interrupt
The internal timer and repeat counter has been expired. (
See also description of TIMR
register!
)
ICA … Interrupt of Channel A (Channel B only)
Indicates, that an interrupt is caused by channel A and the interrupt source(s) is (are)
indicated in the ISTA register of channel A (i.e. at least one bit of the ISTA register of
channel A is set).
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