參數(shù)資料
型號: SAF82526
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 104/126頁
文件大?。?/td> 730K
代理商: SAF82526
Semiconductor Group
104
SAB 82525
SAB 82526
SAF 82525
SAF 82526
CCR1
(2F/6F)
7
PU
SC1
SC0
ODS
ITF
OIN
CM2 CM1 CM0
0
0 … power down (standby)
1 … power up (active)
PU … Switches between Power Up and Power Down mode
00 … NRZ data encoding
10 … NRZI data encoding
01 … bus configuration, timing mode 1
11 … bus configuration, timing mode 2
SC1, SC0. . .Serial Port Configuration
Value after RESET: 00
H
Channel Configuration Register 1 (READ/WRITE)
If bus configuration is selected, only NRZ coding is supported.
Note:
RLCR
(2E/6E)
7
RC
RL6
RL0
0
Receive Length Check Register (WRITE)
0 … receive length check feature disabled
1 … receive length check feature enabled
RC … Receive Check (on/off)
The maximum receive length after which data reception is suspended can be programmed
here. Depending on the value RL programmed via RL6 … RL0, the receive length is
(RL + 1)
×
32 bytes! A frame exceeding this length is treated as if it was aborted by the
opposite station (RME Interrupt, RAB bit set).
In this case, the Receive Byte Count (RBCH, RBCL) is greater than the programmed
receive length.
RL … Receive Length
All bytes stored in the RFIFO are relevant for the receive length check feature including
the receiver status byte.
Note:
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