4
27631A5 September 28, 2004
A d v a n c e I n f o r m a t i o n
Figure 20. Alternate CE# Controlled Write (Erase/
Program) Operation Timings.............................................. 162
Erase And Programming Performance .............. 163
TSOP Pin and BGA Package Capacitance ......... 163
pSRAM Type 2 ................................................164
Features ................................................................ 164
Product Information ............................................ 164
Pin Description ..................................................... 164
Power Up Sequence ............................................. 165
Timing Diagrams ...................................................166
Power Up ............................................................................................................166
Figure 21. Power Up 1 (CS1# Controlled)............................ 166
Figure 22. Power Up 2 (CS2 Controlled) .............................. 166
Functional Description ........................................ 166
Absolute Maximum Ratings ................................. 167
DC Recommended Operating Conditions ......... 167
Capacitance (Ta = 25°C, f = 1 MHz) .................... 167
DC and Operating Characteristics ..................... 167
Common ..............................................................................................................167
16M pSRAM .........................................................................................................168
32M pSRAM ........................................................................................................168
64M pSRAM ........................................................................................................169
AC Operating Conditions ................................... 169
Test Conditions (Test Load and Test Input/Output Reference) .......169
Figure 23. Output Load..................................................... 169
ACC Characteristics (Ta = -40°C to 85°C, V
= 2.7 to 3.1 V) ........170
Timing Diagrams ....................................................171
Read Timings .......................................................................................................171
Figure 24. Timing Waveform of Read Cycle(1)...................... 171
Figure 25. Timing Waveform of Read Cycle(2)...................... 171
Figure 26. Timing Waveform of Read Cycle(2)...................... 171
Write Timings ....................................................................................................172
Figure 27. Write Cycle #1 (WE# Controlled) ........................ 172
Figure 28. Write Cycle #2 (CS1# Controlled)....................... 172
Figure 29. Timing Waveform of Write Cycle(3)
(CS2 Controlled) ............................................................. 173
Figure 30. Timing Waveform of Write Cycle(4) (UB#, LB#
Controlled) ..................................................................... 173
pSRAM Type 6 ................................................174
Features ................................................................. 174
Pin Description ..................................................... 174
Functional Description ......................................... 175
Absolute Maximum Ratings ................................ 175
DC Recommended Operating Conditions
(Ta = -40°C to 85°C) ............................................. 175
DC Characteristics (Ta = -40°C to 85°C,
VDD = 2.6 to 3.3 V) (See Note 3 to 4) ................ 176
Capacitance (Ta = 25°C, f = 1 MHz) .................... 176
AC Characteristics and Operating
Conditions ............................................................. 176
(Ta = -40°C to 85°C, VDD = 2.6 to 3.3 V) (See Note 5 to 11) ............176
AC Test Conditions .............................................. 177
Timing Diagrams ................................................... 178
Read Timings .......................................................................................................178
Figure 1. Read Cycle........................................................ 178
Figure 2. Page Read Cycle (8 Words Access) ....................... 179
Write Timings ....................................................................................................180
Figure 3. Write Cycle #1 (WE# Controlled) (See Note 8) ...... 180
Figure 4. Write Cycle #2 (CE# Controlled) (See Note 8) ....... 181
Deep Power-down Timing ..............................................................................181
Figure 5. Deep Power Down Timing.................................... 181
Power-on Timing ................................................................................................181
Figure 6. Power-on Timing................................................ 181
Provisions of Address Skew ...........................................................................182
Read ...................................................................................................................182
Figure 7. Read ................................................................ 182
Write .................................................................................................................182
Figure 8. Write................................................................ 182
Revision Summary .........................................183