參數(shù)資料
型號(hào)： S25FL001D0FNFI001
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
中文描述： 1M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝： 6 X 5 MM, LEAD FREE, WSON-8
文件頁數(shù)： 7/38頁
文件大?。?/td> 488K
代理商： S25FL001D0FNFI001
June 9, 2004 30167A+1
S25FL Family (Serial Peripheral Interface)
7
P r e l i m i n a r y I n f o r m a t i o n
Signal Description
Signal Data Output (SO):
This output signal is used to transfer data serially out
of the device. Data is shifted out on the falling edge of Serial Clock (SCK).
Serial Data Input (SI):
This input signal is used to transfer data serially into
the device. It receives instructions, addresses, and the data to be programmed.
Values are latched on the rising edge of Serial Clock (SCK).
Serial Clock (SCK):
This input signal provides the timing of the serial interface.
Instructions, addresses, and data present at the Serial Data input (SI) are latched
on the rising edge of Serial Clock (SCK). Data on Serial Data Output (SO) changes
after the falling edge of Serial Clock (SCK).
Chip Select (CS#):
When this input signal is High, the device is deselected and
Serial Data Output (SO) is at high impedance. Unless an internal Program, Erase
or Write Status Register cycle is in progress, the device will be in Standby mode.
Driving Chip Select (CS#) Low enables the device, placing it in the active power
mode.
After Power-up, a falling edge on Chip Select (CS#) is required prior to the start
of any instruction.
Hold (HOLD#):
The Hold (HOLD#) signal is used to pause any serial communi-
cations with the device without deselecting the device.
During the Hold instruction, the Serial Data Output (SO) is high impedance, and
Serial Data Input (SI) and Serial Clock (SCK) are Don’t Care.
To start the Hold condition, the device must be selected, with Chip Select (CS#)
driven Low.
Write Protect (W#):
The main purpose of this input signal is to freeze the size
of the area of memory that is protected against program or erase instructions (as
specified by the values in the BP1 and BP0 bits of the Status Register).
SPI Modes
These devices can be driven by a micro controller with its SPI peripheral running
in either of the two following modes:
CPOL = 0, CPHA = 0
CPOL = 1, CPHA = 1
For these two modes, input data is latched in on the rising edge of Serial Clock
(SCK), and output data is available from the falling edge of Serial Clock (SCK).
The difference between the two modes, as shown in
Figure 2
, is the clock polarity
when the bus master is in Standby and not transferring data:
SCK remains at 0 for (CPOL = 0, CPHA = 0)
SCK remains at 1 for (CPOL = 1, CPHA = 1)
相關(guān)PDF資料
PDF描述
S25XXXH SCR
S2516MH SCR
S29GL032A30FFI012 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology
S29GL032A100FAI013 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology
S29GL032A100FAIR10 64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S25FL001D0FNFI003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL001D0FNFI011 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL001D0FNFI013 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL002D 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
S25FL002D0FMAI001 制造商:SPANSION 制造商全稱:SPANSION 功能描述:2 Megabit, 1 Megabit CMOS 3.0 Volt Flash Memory with 25 MHz SPI Bus Interface
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*