S1C60N08 TECHNICAL HARDWARE
EPSON
I-81
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
4.16.4 Control of interrupt and HALT
Table 4.16.4.1 shows the interrupt control bits and their addresses.
Table 4.16.4.1 Interrupt control bits
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
2E5H
EIK03
EIK02
EIK01
EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
Enable
Mask
Interrupt mask register (K00–K03)
2E4H
KCP03
KCP02
KCP01
KCP00
R/W
KCP03
KCP02
KCP01
KCP00
0
Input comparison register (K00–K03)
2E6H
HLMOD
BLD0 EISWIT1 EISWIT0
R/W
R
R/W
HLMOD
BLD0
EISWIT1
EISWIT0
0
Heavy load
Low
Enable
Normal
Mask
Heavy load protection mode register
Sub-BLD evaluation data
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
2E8H
CSDC
ETI2
ETI8
ETI32
R/W
CSDC
ETI2
ETI8
ETI32
0
Static
Enable
Dynamic
Mask
LCD drive switch
Interrupt mask register (clock timer 2 Hz)
Interrupt mask register (clock timer 8 Hz)
Interrupt mask register (clock timer 32 Hz)
2E7H
SCTRG
EIK10
KCP10
K10
WR
R/W
SCTRG
3
EIK10
KCP10
K10
–
0
– 2
Trigger
Enable
High
–
Mask
Low
Serial I/F clock trigger
Interrupt mask register (K10)
Input comparison register (K10)
Input port data (K10)
2E9H
0
TI2
TI8
TI32
R
0 3
TI2 4
TI8 4
TI32 4
– 2
0
–
Yes
–
No
Unused
Interrupt factor flag (clock timer 2 Hz)
Interrupt factor flag (clock timer 8 Hz)
Interrupt factor flag (clock timer 32 Hz)
2EAH
IK1
IK0
SWIT1
SWIT0
R
IK1 4
IK0 4
SWIT1 4
SWIT0 4
0
Yes
No
Interrupt factor flag (K10)
Interrupt factor flag (K00–K03)
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
1
2
Initial value at initial reset
Not set in the circuit
3
4
Always "0" being read
Reset (0) immediately after being read
5 Undefined
2F3H
0
IK2
ISIO
R
0 3
IK2 4
ISIO 4
– 2
0
–
Yes
–
No
Unused
Interrupt factor flag (K20–K23)
Interrupt factor flag (serial I/F)
2F5H
EIK23
EIK22
EIK21
EIK20
R/W
EIK23
EIK22
EIK21
EIK20
0
Enable
Mask
Interrupt mask register (K20–K23)
2F2H
SCS1
SCS0
SE2
EISIO
R/W
SCS1
SCS0
SE2
EISIO
1
0
Enable
Mask
Serial I/F clock
mode selection
Serial I/F clock edge selection
Interrupt mask register (serial I/F)
0
CLK
1
CLK/2
2
CLK/4
3
Slave
[SCS1, 0]
Clock