參數(shù)資料
型號(hào)： RD28F6408W30B85
廠商： INTEL CORP
元件分類(lèi)： 存儲(chǔ)器
英文描述： 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA80
封裝： 14 X 8 MM, 0.80 MM PITCH, STACK, CSP-80
文件頁(yè)數(shù)： 3/82頁(yè)
文件大小： 749K
代理商： RD28F6408W30B85
Preliminary
iii
28F320W30, 28F3204W30, 28F6408W30, 28F640W30
Contents
1.0
Product Introduction
.................................................................................................1
1.1
Document Purpose................................................................................................1
1.2
Nomenclature........................................................................................................1
Product Description
..................................................................................................2
2.1
Product Overview..................................................................................................2
2.2
Package Diagram..................................................................................................3
2.3
Package Dimensions.............................................................................................4
2.4
Signal Descriptions................................................................................................5
2.5
Block Diagram.......................................................................................................6
2.6
Flash Memory Map................................................................................................6
Product Operations
...................................................................................................9
3.1
Bus Operations......................................................................................................9
3.2
Flash Command Definitions..................................................................................9
Flash Read Modes
...................................................................................................12
4.1
Read Array..........................................................................................................12
4.1.1
Asynchronous Mode...............................................................................12
4.1.2
Synchronous Mode ................................................................................12
4.2
Set Configuration Register (CR)..........................................................................13
4.2.1
Read Mode (RM)....................................................................................14
4.2.2
First Latency Count (LC2
–
0)..................................................................14
4.2.3
WAIT Signal Polarity (WT) .....................................................................16
4.2.4
WAIT Signal Function.............................................................................17
4.2.5
Data Output Configuration (DOC)..........................................................17
4.2.6
WAIT Configuration (WC).......................................................................18
4.2.7
Burst Sequence (BS)..............................................................................19
4.2.8
Clock Configuration (CC) .......................................................................20
4.2.9
Burst Wrap (BW)....................................................................................21
4.2.10 Burst Length (BL2
–
0).............................................................................21
4.3
Read Query Register...........................................................................................21
4.4
Read ID Register.................................................................................................21
4.5
Read Status Register..........................................................................................22
4.5.1
Clear Status Register.............................................................................24
4.6
Read-While-Write/Erase......................................................................................24
Program and Erase Voltages
...............................................................................24
5.1
Factory Program Mode........................................................................................24
5.2
Programming Voltage Protection (VPP)..............................................................25
5.3
Enhanced Factory Programming (EFP)..............................................................25
5.3.1
EFP Requirements and Considerations.................................................26
5.3.2
Setup Phase...........................................................................................26
5.3.3
Program Phase ......................................................................................26
5.3.4
Verify Phase...........................................................................................27
5.3.5
Exit Phase ..............................................................................................27
5.4
Write Protection (V
PP
< V
PPLK
) ...........................................................................27
2.0
3.0
4.0
5.0
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