
Page xxix of liv
26.3.32
Post-ECC Correction Header: Mode Data Register (HEAD23) ..................... 1406
26.3.33
Post-ECC Correction Subheader: File Number (Byte 16) Data Register
(SHEAD20)..................................................................................................... 1406
26.3.34
Post-ECC Correction Subheader: Channel Number (Byte 17) Data Register
(SHEAD21)..................................................................................................... 1407
26.3.35
Post-ECC Correction Subheader: Sub-Mode (Byte 18) Data Register
(SHEAD22)..................................................................................................... 1407
26.3.36
Post-ECC Correction Subheader: Data Type (Byte 19) Data Register
(SHEAD23)..................................................................................................... 1408
26.3.37
Post-ECC Correction Subheader: File Number (Byte 20) Data Register
(SHEAD24)..................................................................................................... 1408
26.3.38
Post-ECC Correction Subheader: Channel Number (Byte 21) Data Register
(SHEAD25)..................................................................................................... 1409
26.3.39
Post-ECC Correction Subheader: Sub-Mode (Byte 22) Data Register
(SHEAD26)..................................................................................................... 1409
26.3.40
Post-ECC Correction Subheader: Data Type (Byte 23) Data Register
(SHEAD27)..................................................................................................... 1410
26.3.41
Automatic Buffering Setting Control Register 0 (CBUFCTL0) ..................... 1410
26.3.42
Automatic Buffering Start Sector Setting: Minutes Control Register
(CBUFCTL1) .................................................................................................. 1412
26.3.43
Automatic Buffering Start Sector Setting: Seconds Control Register
(CBUFCTL2) .................................................................................................. 1412
26.3.44
Automatic Buffering Start Sector Setting: Frames Control Register
(CBUFCTL3) .................................................................................................. 1413
26.3.45
ISY Interrupt Source Mask Control Register (CROMST0M) ........................ 1413
26.3.46
CD-ROM Decoder Reset Control Register (ROMDECRST) ......................... 1414
26.3.47
CD-ROM Decoder Reset Status Register (RSTSTAT) .................................. 1415
26.3.48
Serial Sound Interface Data Control Register (SSI)........................................ 1415
26.3.49
Interrupt Flag Register (INTHOLD)............................................................... 1418
26.3.50
Interrupt Source Mask Control Register (INHINT) ........................................ 1419
26.3.51
CD-ROM Decoder Stream Data Input Register (STRMDIN0) ...................... 1420
26.3.52
CD-ROM Decoder Stream Data Input Register (STRMDIN2) ...................... 1420
26.3.53
CD-ROM Decoder Stream Data Output Register (STRMDOUT0)................ 1421
26.4
Operation ........................................................................................................................ 1422
26.4.1
Endian Conversion for Data in the Input Stream ............................................ 1422
26.4.2
Sync Code Maintenance Function .................................................................. 1423
26.4.3
Error Correction .............................................................................................. 1428
26.4.4
Automatic Decoding Stop Function................................................................ 1429
26.4.5
Buffering Format ............................................................................................ 1430
26.4.6
Target-Sector Buffering Function ................................................................... 1432