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參數(shù)資料
| 型號(hào)： | R1RP0408DGE-2PR |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 12 ns, PDSO36 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-36 |
| 文件頁(yè)數(shù)： | 2/16頁(yè) |
| 文件大小： | 144K |
| 代理商： | R1RP0408DGE-2PR |
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R1RP0408D Series
RJE03C0112-0200
Rev.2.00,
Dec.1.2008,
page 8 of 12
Write Cycle
R1RP0408D
10ns version
12ns version
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Write cycle time
tWC
10
12
ns
Address valid to end of write
tAW
7
8
ns
Chip select to end of write
tCW
7
8
ns
9
Write pulse width
tWP
7
8
ns
8
Address setup time
tAS
0
0
ns
6
Write recovery time
tWR
0
0
ns
7
Data to write time overlap
tDW
5
6
ns
Data hold from write time
tDH
0
0
ns
Write disable to output in low-Z
tOW
3
3
ns
1
Output disable to output in high-Z
tOHZ
5
6
ns
1
Write enable to output in high-Z
tWHZ
5
6
ns
1
Notes: 1. Transition is measured
±200 mV from steady voltage with output load (B). This parameter is
sampled and not 100% tested.
2. Address should be valid prior to or coincident with CS# transition low.
3. WE# and/or CS# must be high during address transition time.
4. If CS# and OE# are low during this period, I/O pins are in the output state.
Then, the data input
signals of opposite phase to the outputs must not be applied to them.
5. If the CS# low transition occurs simultaneously with the WE# low transition or after the WE#
transition, output remains a high impedance state.
6. tAS is measured from the latest address transition to the later of CS# or WE# going low.
7. tWR is measured from the earlier of CS# or WE# going high to the first address transition.
8. A write occurs during the overlap of a low CS# and a low WE#.
A write begins at the latest
transition among CS# going low and WE# going low.
A write ends at the earliest transition
among CS# going high and WE# going high.
tWP is measured from the beginning of write to the
end of write.
9.
tCW is measured from the later of CS# going low to the end of write.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R1RP0408DGE-2PR#B0 | 制造商:Renesas Electronics 功能描述:SRAM Chip Async Single 5V 4M-Bit 512K x 8 12ns 36-Pin SOJ Tray |
| R1RP0408DGE-2PR(#B0) | 制造商:Renesas Electronics 功能描述:12ns 制造商:Renesas 功能描述:SRAM Chip Async Single 5V 4M-Bit 512K x 8 12ns 36-Pin SOJ |
| R1RP0408DI | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:Wide Temperature Range Version 4M High Speed SRAM (512-kword × 8-bit) |
| R1RP0416D | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:4M High Speed SRAM (256-kword X 16-bit) |
| R1RP0416DGE-2LR | 制造商:Renesas Electronics Corporation 功能描述:R1RP0416DGE-2LR |
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