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| 型號： | PCA9698 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT |
| 中文描述： | 40位調(diào)頻I2C總線先進的I / O復位，光電和INT端口 |
| 文件頁數(shù)： | 24/47頁 |
| 文件大?。?/td> | 214K |
| 代理商： | PCA9698 |
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PCA9698_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 19 July 2006
24 of 47
Philips Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
8.2 System configuration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Figure 13
).
8.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; setup and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 13. System configuration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I
2
C-BUS
MULTIPLEXER
SLAVE
Fig 14. Acknowledgement on the I
2
C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
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| PCA9698BS | 制造商:NXP Semiconductors 功能描述:IC IO EXPANDER 40BIT I2C 5 制造商:NXP Semiconductors 功能描述:IC, IO EXPANDER, 40BIT, I2C, 56HVQFN 制造商:NXP Semiconductors 功能描述:IC, IO EXPANDER, 40BIT, I2C, 56HVQFN; Chip Configuration:40bit; Bus Frequency:1MHz; Interface Type:I2C, SMBus; Supply Voltage Min:2.3V; Supply Voltage Max:5.5V; Digital IC Case Style:HVQFN; No. of Pins:56; No. of I/O's:40; MSL:MSL 1 ;RoHS Compliant: Yes |
| PCA9698BS,118 | 功能描述:接口-I/O擴展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698BS,118-CUT TAPE | 制造商:NXP 功能描述:PCA9698 Series 40-Bit Fm I2C-Bus Advanced I/O Port w/ Reset - HVQFN 56 |
| PCA9698DGG | 功能描述:接口-I/O擴展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG,512 | 功能描述:接口-I/O擴展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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