
Appendix A Electrical Characteristics
MC9S12XE-Family Reference Manual , Rev. 1.07
918
Freescale Semiconductor
The VDDF
,
VSS1pin pair supplies the internal NVM logic.
The VDD, VSS2 are the supply pins for the internal digital logic.
VDDPLL, VSSPLL pin pair supply the oscillator and the PLL.
VSS1, VSS2 and VSS3 are internally connected by metal.
VDDA1, and VDDA2 are internally connected by metal.
All VDDX pins are internally connected by metal.
All VSSX pins are internally connected by metal.
VDDA, VDDX and VSSA, VSSX are connected by anti-parallel diodes for ESD protection.
NOTE
In the following context V
DD35
is used for either VDDA, VDDR, and
VDDX; V
SS35
is used for either VSSA and VSSX unless otherwise noted.
I
DD35
denotes the sum of the currents flowing into the VDDA, VDDX and
VDDR pins.
V
DD
is used for VDD, V
SS
is used for VSS1, VSS2 and VSS3.
V
DDPLL
is used for VDDPLL, V
SSPLL
is used for VSSPLL
I
DD
is used for the sum of the currents flowing into VDD, VDDF and
VDDPLL.
A.1.3
Pins
There are four groups of functional pins.
A.1.3.1
I/O Pins
Standard I/O pins have a level in the range of 3.13V to 5.5 V. This class of pins is comprised of all port I/O
pins (including PortAD), BKGD and the RESET pins.The internal structure of all those pins is identical;
however, some of the functionality may be disabled. For example the BKGD pin pull up is always enabled.
A.1.3.2
Analog Reference
This group is made up by the V
RH
and V
RL
pins.
A.1.3.3
Oscillator
The pins EXTAL, XTAL dedicated to the oscillator have a nominal 1.8 V level. They are supplied by
VDDPLL.
A.1.3.4
TEST
This pin is used for production testing only.