參數(shù)資料
型號： ORT4622
英文描述： Field-Programmable System Chip (FPSC) Four-Channel x 622 Mbits/s Backplane Transceiver
中文描述： 現(xiàn)場可編程系統(tǒng)芯片（促進文化基金）四通道x 622 Mbits /秒背板收發(fā)器
文件頁數(shù)： 33/90頁
文件大?。?/td> 1915K
代理商： ORT4622
Lucent Technologies Inc.
Lucent Technologies Inc.
33
Preliminary Data Sheet
March 2000
ORCA ORT4622 FPSC
Four-Channel x 622 Mbits/s Backplane Transceiver
Memory Map
(continued)
Table 10. Memory Map Bit Descriptions
Bit/Register Name(s
)
Bit/ Register
Location (hex)
Register
Type
Default
Value
(hex)
Description
Device Register Block
(continued)
scrambler/
descrambler control
0C [6]
creg
1
0
No receive direction descramble/transmit direction
scramble.
In receive direction, descramble channel after
SONET frame recovery.
In transmit direction scramble data just before paral-
lel-to-serial conversion.
No error insertion.
Invert corresponding bit in B1 byte.
Consolidation Interrupts
0
No interrupt.
Mask interrupt in enable/mask register.
1
Interrupt.
Enable interrupt in enable/mask register.
1
transmit B1 error insert
mask [7:0]
channel A int
channel B int
channel C int
channel D int
per device int
enable/mask register
[4:0]
frame offset error flag
0F [7:0]
creg
00
0
1
10 [0]
10 [1]
10 [2]
10 [3]
10 [4]
11 [4:0]
creg
creg
creg
creg
creg
iereg
0
0
0
0
0
0
write to locked register
error flag
enable/mask register
[1:0]
12 [0]
12 [1]
13 [1:0]
iareg
iareg
iereg
0
0
0
If in the receive direction the phase offset between any
two channels exceeds 17 bytes, then a frame offset error
event will be issued. This condition is continuously moni-
tored.
If the ORT4622 core memory map has not been unlocked
(by writing A1 00 to the lock registers), and any address
other than the lockreg registers or scratch pad register is
written to, then a write to locked register event will be gen-
erated.
Channel Register Block (Channel A, Channel B, Channel C, Channel D)
Rx behavior in LOF
20, 38 50, 68 [0]
—
1
Receive Behavior in LOF
0
When receive direction OOF occurs, do not insert
AIS-L.
1
When receive direction OOF occurs, insert AIS-L.
Force AIS-L Control
0
Do not force AIS-L.
1
Force AIS-L.
0
Do not insert a parity error.
1
Insert parity error in parity bit of receive TOH serial
output for as long as this bit is set.
0
Set receive direction
K1/K2 bytes to 0.
1
Pass receive direction K1/K2 though pointer mover.
0
Do not insert parity error.
1
Insert parity error in the parity bit of receive direction
parallel output bus for as long as this bit is set.
Force AIS-L control
20, 38, 50, 68 [1]
0
TOH serial output port
par err ins cmd
20, 38, 50, 68 [2]
—
0
Rx K1/K2 source
select
parallel output bus par-
ity err ins cmd
20, 38, 50, 68 [3]
—
0
20, 38, 50, 68 [4]
—
0
相關(guān)PDF資料
PDF描述
ort551 Reed Switch(舌簧開關(guān))
ord2210v Reed Switch(舌簧開關(guān))
ord2210 Reed Switch(舌簧開關(guān))
ord211 Reed Switch(舌簧開關(guān))
ord2211 Reed Switch(舌簧開關(guān))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ORT4622BC432-DB 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT551 制造商:Hasco Components International Corp 功能描述:
ORT551(1315) 制造商:OKI Semiconductor 功能描述:
ORT551/10-15 AT 功能描述:磁性/簧片開關(guān) 1 Form C 14mm AT 1015 OKI RoHS:否 制造商:MEDER electronic (Standex) 開關(guān)類型:Reed 觸點形式:1 Form A (SPST-NO) 觸點額定值:10 VA 操作范圍:10 At to 50 At 工作間隙: 磁鐵類型: 顏色: 端接類型:Axial 封裝:Bulk
ORT551-1/10-15 AT 功能描述:磁性/簧片開關(guān) 1 Form C 14mm AT1015 Formed Ld OKI RoHS:否 制造商:MEDER electronic (Standex) 開關(guān)類型:Reed 觸點形式:1 Form A (SPST-NO) 觸點額定值:10 VA 操作范圍:10 At to 50 At 工作間隙: 磁鐵類型: 顏色: 端接類型:Axial 封裝:Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*