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參數(shù)資料
| 型號： | ORCAORT4622 |
| 英文描述： | Field-Programmable System Chip (FPSC) Four-Channel x 622 Mbits/s Backplane Transceiver |
| 中文描述： | 現(xiàn)場可編程系統(tǒng)芯片（促進(jìn)文化基金）四通道x 622 Mbits /秒背板收發(fā)器 |
| 文件頁數(shù)： | 46/90頁 |
| 文件大小： | 1915K |
| 代理商： | ORCAORT4622 |
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46
Lucent Technologies Inc.
ORCAORT4622 FPSC
Four-Channel x 622 Mbits/s Backplane Transceiver
Preliminary Data Sheet
March 2000
Timing Characteristics
(continued)
Propagation Delay
—The time between the specified
reference points. The delays provided are the worst-
case of the tphh and tpll delays for noninverting func-
tions, tplh and tphl for inverting functions, and tphz and
tplz for 3-state enable.
Setup Time
—The interval immediately preceding the
transition of a clock or latch enable signal, during which
the data must be stable to ensure it is recognized as
the intended value.
Hold Time
—The interval immediately following the
transition of a clock or latch enable signal, during which
the data must be held stable to ensure it is recognized
as the intended value.
3-State Enable
—The time from when a 3-state control
signal becomes active and the output pad reaches the
high-impedance state.
PFU Timing
Refer to ORCA Series 3 data sheet for the following:
Combination PFU Timing Characteristics
Sequential PFU Timing Characteristics
Ripple Mode PFU Timing Characteristics
Synchronous Memory Write Characteristics
Synchronous Memory Read Characteristics
PLC Timing
Refer to ORCA Series 3 data sheet for the following:
PFU Output MUX and Direct Routing Timing Charac-
teristics
SLIC Timing
Refer to ORCA Series 3 data sheet for the following:
Supplemental Logic and Interconnect Cell (SLIC) Tim-
ing Characteristics
PIO Timing
Refer to ORCA Series 3 data sheet for the following:
Programmable I/O (PIO) Timing Characteristics
Special Function Timing
Refer to ORCA Series 3 data sheet for the following:
Microprocessor Interface (MPI) Timing Characteristics
Programmable Clock Manager (PCM) Timing Charac-
teristics
Boundary-Scan Timing Characteristics
Clock Timing
Refer to ORCA Series 3 data sheet for the following:
ExpressCLK
(ECLK) and Fast Clock (FCLK) Timing
Characteristics
General-Purpose Clock Timing Characteristics (Inter-
nally Generated Clock)
ORT4622
ExpressCLK
to Output Delay (Pin-to-Pin)
ORT4622 Fast Clock (FCLK) to Output Delay (Pin-to-
Pin)
ORT4622 General System Clock (SCLK) to Output
Delay (Pin-to-Pin)
ORT4622 Input to ExpressCLK (ECLK) Fast Capture
Setup/Hold Time (Pin-to-Pin)
ORT4622 Input to Fast Clock Setup/Hold Time (Pin-to-
Pin)
ORT4622 Input to General System Clock Setup/Hold
Time (Pin-to-Pin)
Configuration Timing
Refer to ORCA Series 3 data sheet for Configuration
Timing Characteristics.
Readback Timing
Refer to ORCA Series 3 data sheet for Readback Tim-
ing Characteristics.
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