參數(shù)資料
型號(hào)： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 31/160頁
文件大?。?/td> 1997K
代理商： OMAP5910(DSP)
Introduction
19
August 2002 Revised August 2003
SPRS197B
Table 23. Terminal Characteristics and Multiplexing (Continued)
SUPPLY
RESET
STATE#
OTHER
BUFFER
STRENGTH
PU/
PD
§
DESELECTED
INPUT STATE
MUX CTRL
SETTING
TYPE
SIGNAL NAME
GDY
BALL
GZG
BALL
M4
K5
FLASH.CS2
O/Z
regD[8:6] = 000
NA
4 mA
A
1
DVDD5
FLASH.BAA
O/Z
regD[8:6] = 001
NA
M3
K1
FLASH.CS1
O/Z
NA
NA
4 mA
A
1
DVDD5
DVDD5
DVDD5
M7
J2
FLASH.CS0
O/Z
NA
NA
4 mA
A
1
M8
L3
J1
J5
FLASH.BE[1:0]
O/Z
NA
NA
4 mA
A
0
L4
H1
FLASH.ADV
O/Z
NA
NA
4 mA
A
1
DVDD5
DVDD5
L7
K3
K4
L8
J1
J3
J4
J2
K7
H3
H4
K8
G2
G3
G4
F3
J7
E3
F4
D2
E4
C1
D3
J8
J3
J4
H6
H5
H2
H4
H3
G2
G1
G5
G3
G4
E1
F2
F4
F3
F5
D2
E4
E3
C2
C1
G6
B1
FLASH.A[24:1]
O/Z
NA
NA
4 mA
A, G1
0
H7
C3
FLASH.RDY
I
NA
NA
B
input
DVDD5
NA
E5
I = Input, O = Output, Z = High-Impedance
’regx’ denotes the terminal multiplexing register that controls the specified terminal where regx = FUNC_MUX_CTRL_x
§PD20 = 20-
μ
A internal pulldown, PD100 = 100-
μ
A pulldown, PU20 = 20-
μ
A internal pullup, PU100 = 100-
μ
A internal pullup
A = Standard LVCMOS input/output
B = Fail-safe LVCMOS input/output
C = USB transceiver input/output
D = I2C input/output buffers
E = Fail-safe LVCMOS input and Standard LVCMOS output
F = analog oscillator terminals
#Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
|| UART1 signals can be multiplexed to this pin via additional multiplexing in the USB module.
N11
RSVD
NA
NA
NA
NA
G1 = Terminal may be gated by BFAIL
G2 = Terminal may be gated by GPIO9 and MPUIO3
G3 = Terminal may be gated by BFAIL and PWRON_RESET
H1 = Terminal may be 3-stated by BFAIL input
J = Boundary-scannable terminal
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