參數(shù)資料
型號(hào)： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 124/160頁
文件大小： 1997K
代理商： OMAP5910(DSP)
Electrical Specifications
112
August 2002 Revised August 2003
SPRS197B
5.7.2 OMAP5910 MPU Core Reset
The MPU_RST signal is the active-low asynchronous input responsible for the reset of the OMAP5910 MPU
core. Stable power supplies are assumed prior to MPU_RST assertion. Figure 56 illustrates the behavior of
MPU_RST and RST_OUT. In Figure 5.6, a logic high level is assumed on the PWRON_RESET input. In the case
where an application ties the PWRON_RESET and MPU_RST together, the behavior described in
Section 5.7.1,
OMAP5910 Device Reset
, will override. See Table 58 and Table 59.
Table 58. MPU_RST Timing Requirements
NO.
MIN
MAX
UNIT
μ
s
M3
tw(MPU_RST)
Pulse duration, MPU_RST low
50
Table 59. MPU_RST Switching Characteristics
NO.
PARAMETER
MIN
MAX
UNIT
μ
s
M1
td(MPULRSTL)
Delay time, MPU_RST low to RST_OUT low
1
M2
td(MPUHRSTH)
Delay time, MPU_RST high to RST_OUT high
MPU_RST asserted during
OMAP5910 awake state
10
s
MPU_RST asserted during
OMAP5910 deep sleep state
T + 10
μ
P = period of 32-kHz clock, C = Value of ULPD wakeup time setup register, SETUP_ULPD1_REG (Default 03FFh), T = P*C
MPU_RST
RST_OUT
M1
M2
M3
Figure 56. MPU Core Reset Timings
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OMAP5910GGZG1 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910GGZG2 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910JGDY1R 功能描述:IC OMAP DUAL-CORE PROC 289-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:OMAP-59xx 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
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OMAP5910JGZG1 制造商:Texas Instruments 功能描述:
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