參數(shù)資料
型號(hào)： MSC8144VT800A
廠商： Freescale Semiconductor
文件頁數(shù)： 31/80頁
文件大?。?/td> 0K
描述： IC DSP QUAD 800MHZ 783FCBGA
標(biāo)準(zhǔn)包裝： 1
系列： StarCore
類型： SC3400 內(nèi)核
接口： 以太網(wǎng)，I²C，SPI，TDM，UART，UTOPIA
時(shí)鐘速率： 800MHz
非易失內(nèi)存： 外部
芯片上RAM： 10.5MB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.00V
工作溫度： 0°C ~ 90°C
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
Electrical Characteristics
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
37
2.6.3.1
Power-On Reset (PORESET) Pin
Asserting PORESET initiates the power-on reset flow. PORESET must be asserted externally for at least 32 CLKIN cycles after
VDD and VDDIO are both at their nominal levels.
2.6.3.2
Reset Configuration
The MSC8144 has two mechanisms for writing the reset configuration:
Through the I2C port
Through external pins
Through internal hard coded
Twenty-three signals (see Section 1 for signal description details) are sampled during the power-on reset sequence to define the
Reset Word Configuration Source and operating conditions:
RCW_SRC[2–0]
RC[16–0]
The RCFG_CLKIN_RNG pin must be valid during power-on or hard reset sequence. The STOP_BS pin must be always valid
and is also sampled during power-on reset sequence for RCW loading from an I2C EEPROM.
2.6.3.3 Reset Timing Tables
Table 19 and Figure 7 describe the reset timing for a reset configuration.
HRESET driven
Yes
No
IPBus modules reset (TDM, UART, SWT,
DDRC, IPBus master, GIC, HS, and GPIO)
Yes
SRESET driven
Yes
Depends on command
Extended cores reset
Yes
CLASS registers reset
Yes
Some
registers
Some registers
Timers, Performance Monitor
Yes
No
QUICC Engine subsystem, PCI, DMA
Yes
Most
registers
Most registers
Table 19. Timing for a Reset Configuration Write
No.
Characteristics
Expression
Max
Min
Unit
1
Required external PORESET duration minimum
33 MHz <= CLKIN < 44 MHz
44 MHz <= CLKIN < 66 MHz
66 MHz <= CLKIN < 100 MHz
100 MHz <= CLKIN < 133 MHz
32/CLKIN
1280
728
485
320
727
484
320
241
ns
Table 18. Reset Actions for Each Reset Source (continued)
Reset Action/Reset Source
Power-On Reset
(PORESET)
Hard Reset (HRESET)
Soft Reset (SRESET)
External only
External or Internal
(Software Watchdog,
Software or RapidIO)
External or
internal
Software
JTAG Command:
EXTEST, CLAMP, or
HIGHZ
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