參數(shù)資料
型號(hào): MPC5553MVR132
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 26/68頁(yè)
文件大?。?/td> 0K
描述: MCU 1.5MB FLASH 132MHZ 416-PBGA
標(biāo)準(zhǔn)包裝: 200
系列: MPC55xx Qorivva
核心處理器: e200z6
芯體尺寸: 32-位
速度: 132MHz
連通性: CAN,EBI/EMI,以太網(wǎng),SCI,SPI
外圍設(shè)備: DMA,POR,PWM,WDT
輸入/輸出數(shù): 220
程序存儲(chǔ)器容量: 1.5MB(1.5M x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.35 V ~ 1.65 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 40x12b
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 416-BBGA
包裝: 托盤(pán)
MPC5553 Microcontroller Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
32
3.13.3
Nexus Timing
Figure 10. Nexus Output Timing
Table 21. Nexus Debug Port Timing 1
1 JTAG specifications apply when used for debug functionality. All Nexus timing relative to MCKO is measured from 50% of
MCKO and 50% of the respective signal. Nexus timing specified at VDD = 1.35–1.65 V, VDDE = 2.25–3.6 V,
VDD33 and VDDSYN = 3.0–3.6 V, TA = TL to TH, and CL = 30 pF with DSC = 0b10.
Spec
Characteristic
Symbol
Min.
Max.
Unit
1
MCKO cycle time
tMCYC
1 2
2 The Nexus AUX port runs up to 82 MHz. Set NPC_PCR[MCKO_DIV] to divide-by-two if the system frequency
is greater than 82 MHz.
8tCYC
2
MCKO duty cycle
tMDC
40
60
%
3
MCKO low to MDO data valid 3
3 MDO, MSEO, and EVTO data is held valid until the next MCKO low cycle occurs.
tMDOV
–1.5
3.0
ns
4
MCKO low to MSEO data valid 3
tMSEOV
–1.5
3.0
ns
5
MCKO low to EVTO data valid 3
tEVTOV
–1.5
3.0
ns
6
EVTI pulse width
tEVTIPW
4.0
tTCYC
7
EVTO pulse width
tEVTOPW
1—
tMCYC
8
TCK cycle time
tTCYC
4 4
4 Limit the maximum frequency to approximately 16 MHz (V
DDE = 2.25–3.0 V) or 20 MHz (VDDE = 3.0–3.6 V) to meet the timing
specification for tJOV of [0.2 x tJCYC] as outlined in the IEEE-ISTO 5001-2003 specification.
—tCYC
9
TCK duty cycle
tTDC
40
60
%
10
TDI, TMS data setup time
tNTDIS, tNTMSS
8—
ns
11
TDI, TMS data hold time
tNTDIH, tNTMSH
5—
ns
12
TCK low to TDO data valid
tJOV
VDDE = 2.25–3.0 V
0
12
ns
VDDE = 3.0–3.6 V
0
10
ns
13
RDY valid to MCKO 5
5 The RDY pin timing is asynchronous to MCKO and is guaranteed by design to function correctly.
——
1
2
3
4
5
MCKO
MDO
MSEO
EVTO
Output Data Valid
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