參數(shù)資料
型號： MH28D72KLG-10
廠商： Mitsubishi Electric Corporation
英文描述： 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
中文描述： 9663676416位（134217728 - Word的72位），雙數(shù)據(jù)速率同步DRAM模塊
文件頁數(shù)： 30/39頁
文件大小： 337K
代理商： MH28D72KLG-10
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
MH28D72KLG-75,-10
9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MIT-DS-0412-0.1
21.Mar.2001
Preliminary Spec.
Some contents are subject to change without notice.
30
Write Interrupted by Write (BL=8)
Command
A0-9,11
A10
BA0,1
WRITE
Yi
0
00
WRITE
Yk
0
10
WRITE
Yj
0
00
WRITE
Yl
0
00
[Write interrupted by Write]
Burst write operation can be interrupted by write of any bank. Random column access is
allowed. WRITE to WRITE interval is minimum 1 CLK.
DQ
Dai1
Daj1
Daj3
Dak1
Dak3
Dak5
Dal1
DQS
Dal2 Dal3
Dal5
Dal6 Dal7
Dal4
Dal0
Dak4
Dak2
Dak0
Dai0
Daj0
Daj2
/CLK
CLK
Module input and output timing.
相關(guān)PDF資料
PDF描述
MH28D72KLG-75 9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
MH28S72PJG-5 Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin RoHS Compliant: No
MH28S72PJG-6 Circular Connector; Body Material:Aluminum Alloy; Series:KPSE07; No. of Contacts:19; Connector Shell Size:14; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Socket RoHS Compliant: No
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MH28D72KLG-75 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:9,663,676,416-BIT (134,217,728-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
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MH28FAD-R 制造商:MTRONPTI 制造商全稱:MTRONPTI 功能描述:8 pin DIP, 3.3 or 5.0 Volt, HCMOS/TTL Clock Oscillator
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