參數(shù)資料
型號: MFRC50001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Highly integrated ISO-IEC 14443 A reader IC
封裝: MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,;
文件頁數(shù): 67/110頁
文件大?。?/td> 841K
代理商: MFRC50001T
MFRC500_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
67 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
[1]
This command is the combination of the Transmit and Receive commands.
Transceive
[1]
1Eh
transmits data from FIFO buffer to the card and
automatically activates the receiver after
transmission. The receiver waits until the time defined
in the RxWait register has elapsed before starting.
See
Section 11.2.3 on page 75
.
reads data from the FIFO buffer and writes it to the
EEPROM. See
Section 11.3.1 on page 77
.
data stream
data stream
WriteE2
01h
start address LSB
start address MSB
data byte stream
start address LSB
start address MSB
number of data bytes
start address LSB
start address MSB
byte 0 LSB
byte 1
byte 10
byte 11 MSB
card Authent1 command
card block address
card serial number LSB
card serial number byte 1
card serial number byte 2
card serial number MSB
-
-
ReadE2
03h
reads data from the EEPROM and sends it to the
FIFO buffer. See
Section 11.3.2 on page 79
.
Remark:
Keys cannot be read back
data bytes
LoadKeyE2
0Bh
copies a key from the EEPROM into the key buffer
See
Section 11.6.1 on page 81
.
-
LoadKey
19h
reads a key from the FIFO buffer and loads it into the
key buffer. See
Section 11.6.2 on page 81
.
Remark:
The key has to be prepared in a specific
format (refer to
Section 9.2.3.1 “Key format” on page
13
)
-
Authent1
0Ch
performs the first part of card authentication using the
Crypto1 algorithm. See
Section 11.6.3 on page 82
.
-
Authent2
14h
performs the second part of card authentication using
the Crypto1 algorithm. See
Section 11.6.4 on
page 82
.
reads data from EEPROM and initializes the
MFRC500 registers. See
Section 11.4.1 on page 79
.
-
LoadConfig
07h
start address LSB
start address MSB
data byte stream
-
CalcCRC
12h
activates the CRC coprocessor
Remark:
The result of the CRC calculation is read
from the CRCResultLSB and CRCResultMSB
registers. See
Section 11.4.2 on page 80
.
-
Table 126. MFRC500 commands overview
…continued
Command
Value Action
FIFO communication
Arguments and data
sent
Data received
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