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| 型號： | MFRC50001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Highly integrated ISO-IEC 14443 A reader IC |
| 封裝： | MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,; |
| 文件頁數(shù)： | 51/110頁 |
| 文件大?。?/td> | 841K |
| 代理商： | MFRC50001T |
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MFRC500_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
51 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
10.5.2.7
CRCResultMSB register
MSB of the CRC coprocessor register.
Table 59.
Table 60.
Bit
7 to 0
10.5.2.8
BitFraming register
Adjustments for bit oriented frames.
Table 61.
Bit
Symbol
Access
Table 62.
Bit
7
6 to 4 RxAlign[2:0]
CRCResultMSB register (address: 0Eh) reset value: xxxx xxxxb, xxh bit
allocation
7
6
5
4
CRCResultMSB[7:0]
Bit
Symbol
Access
3
2
1
0
R
CRCResultMSB register bit descriptions
Symbol
CRCResultMSB[7:0]
Description
gives the CRC register’s most significant byte value; only valid if
CRCReady = logic 1.
The register’s value is undefined for 8-bit CRC calculation.
BitFraming register (address: 0Fh) reset value: 0000 0000b, 00h bit allocation
7
6
5
4
0
RxAlign[2:0]
R/W
D
3
0
2
1
0
TxLastBits[2:0]
D
R/W
BitFraming register bit descriptions
Symbol
Value
0
-
Description
reserved
defines the bit position in the FIFO buffer for the first bit received
and stored. Additional received bits are stored in the next
subsequent bit positions. After reception, RxAlign[2:0] is
automatically cleared. For example:
the LSB of the received bit is stored in bit position 0 and the
second received bit is stored in bit position 1
the LSB of the received bit is stored in bit position 1, the
second received bit is stored in bit position 2
000
001
...
111
the LSB of the received bit is stored in bit position 7, the
second received bit is stored in the next byte in bit position 0
reserved
defines the number of bits of the last byte that shall be
transmitted. 000 indicates that all bits of the last byte will be
transmitted. TxLastBits[2:0] is automatically cleared after
transmission.
3
2 to 0 TxLastBits[2:0]
0
-
-
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